DF3048BVX25WV Renesas Electronics America, DF3048BVX25WV Datasheet - Page 101

MCU 3/5V 128K PB-FREE 100-TQFP

DF3048BVX25WV

Manufacturer Part Number
DF3048BVX25WV
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048BVX25WV

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048BVX25WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bits 7 and 6—Reserved: Read-only bits, always read as 1.
Bits 5 to 3—Reserved: Read-only bits, always read as 0.
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the logic levels at pins
MD
MDS0 are read-only bits. The mode pin (MD
MDCR is read.
Note: For the flash memory version with single power supply (H8/3048F-ONE), flash memory
3.3
SYSCR is an 8-bit register that controls the operation of the H8/3048B Group.
Bit
Initial value
Read/Write
2
to MD
can be written to in the boot mode. In the boot mode, the inverted value of the MD2 signal
is set to bit MDS2.
System Control Register (SYSCR)
0
(the current operating mode). MDS2 to MDS0 correspond to MD
SSBY
Software standby
Enables transition to software standby mode
R/W
7
0
STS2
R/W
Standby timer select 2 to 0
These bits select the waiting time at
recovery from software standby mode
6
0
STS1
R/W
5
0
2
to MD
STS0
R/W
4
0
0
User bit enable
Selects whether to use the UI bit in CCR
as a user bit or an interrupt mask bit
) levels are latched into these bits when
Rev. 3.00 Sep 27, 2006 page 73 of 872
R/W
UE
3
1
Section 3 MCU Operating Modes
NMI edge select
Selects the valid edge
of the NMI input
NMIEG
R/W
2
0
Reserved bit
2
to MD
REJ09B0325-0300
1
1
RAM enable
Enables or
disables
on-chip RAM
0
. MDS2 to
RAME
R/W
0
1

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