DF3048BVX25WV Renesas Electronics America, DF3048BVX25WV Datasheet - Page 638
![MCU 3/5V 128K PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3048BVX25WV
Manufacturer Part Number
DF3048BVX25WV
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3048BVX25WV
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3048BVX25WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
Table 18.11 Hardware Protection
Item
FWE pin
protection
Reset/
standby
protection
Error
protection
Notes: 1. Excluding a RAM area overlapping flash memory.
Rev. 3.00 Sep 27, 2006 page 610 of 872
REJ09B0325-0300
2. It is possible to perform a program-verify operation on the 128 bytes being
3. All blocks are unerasable and block-by-block specification is not possible.
4. See section 4.2.2, Reset Sequence, and section 18.11, Notes on Flash Memory
programmed, or an erase-verify operation on the block being erased.
Programming/Erasing. The H8/3048F-ONE requires at least 20 system clocks for a
reset period during operation.
Description
When a low level is input to the FWE pin,
FLMCR1, and EBR are initialized, and the
program/erase-protected state is entered.
In a reset (including a WDT overflow reset) and
in standby mode, FLMCR1, FLMCR2, and EBR
are initialized, and the program/erase-protected
state is entered.
In a reset via the RES pin, the reset state is not
entered unless the RES pin is held low until
oscillation stabilizes after powering on. In the
case of a reset during operation, hold the RES
pin low for the RES pulse width specified in the
AC Characteristics section *
When a microcomputer operation error (error
generation (FLER = 1)) was detected while flash
memory was being programmed/erased, error
protection is enabled. At this time, the FLMCR1
and EBR settings are held, but programming/
erasing is aborted at the time the error was
generated. Error protection is released only by a
reset via the RES pin or a WDT reset, or in the
hardware standby mode.
4
.
Program Erase
No *
No
No
1
Functions
No *
No *
No *
3
3
3
Verify
No
No
Yes *
2
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