HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 114

MCU 3/5V 60K PB-FREE 84-PLCC

HD64F3337YCP16V

Manufacturer Part Number
HD64F3337YCP16V
Description
MCU 3/5V 60K PB-FREE 84-PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16V

Core Size
8-Bit
Program Memory Size
60KB (60K x 8)
Oscillator Type
Internal
Core Processor
H8/300
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
No. Of I/o's
74
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
6
No. Of Pwm Channels
2
Digital Ic Case Style
PLCC
Controller Family/series
H8/300
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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The CCR is comprised of one byte, but when it is saved to the stack, it is treated as one word of
data. During interrupt processing, two identical bytes of CCR data are saved to the stack to create
one word of data. When the RTE instruction is executed to restore the value from the stack, the
byte located at the even address is loaded into CCR, and the byte located at the odd address is
ignored.
84
SP – 4
SP – 3
SP – 2
SP – 1
SP (R7)
PC
PC
CCR:
SP:
Notes: 1.
H
L
:
:
Upper byte of progam counter
Lower byte of progam counter
Condition code register
Stack pointer
2.
* Ignored on return.
The PC contains the address of the first instruction executed after return.
Registers must be saved and restored by word access at an even address.
Before interrupt
is accepted
Stack area
Figure 4.6 Usage of Stack in Interrupt Handling
Pushed onto stack
SP + 3
SP(R7)
SP + 1
SP + 2
SP + 4
After interrupt
is accepted
CCR *
CCR
PC
PC
H
L
Even address

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