HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 19

• Manufacturer Part Number: HD64F3337YCP16V
• Description: MCU 3/5V 60K PB-FREE 84-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16V

• Core Size: 8-Bit
• Program Memory Size: 60KB (60K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• No. Of I/o's: 74
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 6
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PLCC
• Controller Family/series: H8/300
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 1
1.1
1.2
1.3
Section 2 CPU
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Overview............................................................................................................................
Block Diagram...................................................................................................................
Pin Assignments and Functions.........................................................................................
1.3.1
1.3.2
Overview............................................................................................................................ 25
2.1.1
2.1.2
2.1.3
Register Descriptions......................................................................................................... 27
2.2.1
2.2.2
2.2.3
Data Formats...................................................................................................................... 29
2.3.1
2.3.2
Addressing Modes ............................................................................................................. 32
2.4.1
2.4.2
Instruction Set.................................................................................................................... 38
2.5.1
2.5.2
2.5.3
2.5.4
2.5.5
2.5.6
2.5.7
2.5.8
CPU States ......................................................................................................................... 55
2.6.1
2.6.2
2.6.3
2.6.4
Access Timing and Bus Cycle........................................................................................... 57
2.7.1
2.7.2
Overview
Pin Arrangement ..................................................................................................
Pin Functions........................................................................................................ 12
Features ................................................................................................................ 25
Address Space ...................................................................................................... 26
Register Configuration ......................................................................................... 26
General Registers.................................................................................................. 27
Control Registers.................................................................................................. 27
Initial Register Values .......................................................................................... 28
Data Formats in General Registers....................................................................... 30
Memory Data Formats.......................................................................................... 31
Addressing Mode.................................................................................................. 32
Calculation of Effective Address.......................................................................... 34
Data Transfer Instructions .................................................................................... 40
Arithmetic Operations .......................................................................................... 42
Logic Operations .................................................................................................. 43
Shift Operations.................................................................................................... 43
Bit Manipulations ................................................................................................. 45
Branching Instructions.......................................................................................... 50
System Control Instructions ................................................................................. 52
Block Data Transfer Instruction ........................................................................... 53
Overview .............................................................................................................. 55
Program Execution State ...................................................................................... 56
Exception-Handling State .................................................................................... 56
Power-Down State................................................................................................ 57
Access to On-Chip Memory (RAM and ROM) ................................................... 57
Access to On-Chip Supporting Modules and External Devices .......................... 59
....................................................................................................................... 25
...........................................................................................................
Contents
1
1
6
8
8
i