HD6417727F100V Renesas Electronics America, HD6417727F100V Datasheet - Page 692

MPU 3V 16K PB-FREE 240-QFP

HD6417727F100V

Manufacturer Part Number
HD6417727F100V
Description
MPU 3V 16K PB-FREE 240-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100V

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417727F100V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 20 Serial IO (SIOF)
20.3.4
(1) Transmit or Receive Data
Writing into/reading out of transmit/receive data is done for the following registers.
• Writing transmit data: SITDR register (32 bit access)
• Reading receive data: SIRDR register (32 bit access)
Figure 20.5 shows bit alignment of transmit or receive data and SITDR and SIRDR registers.
Note: In figure 20.5, only data portions that are shown by the oblique lines are transmitted or
Rev.6.00 Mar. 27, 2009 Page 634 of 1036
REJ09B0254-0600
received as effective data.
Thus, the areas without the oblique lines are not the object to transmit or receive.
Register Assignment for Transfer Data
(a) At the 16 bit stereo
(b) At the 16 bit monaural
(c) At the 8 bit monaural
(d) At the 16 bit stereo (right and left same sound)
31
31
31
31
Figure 20.5 Transmit or Receive Data Bit Alignment
Data
Lch. data
24 23
24 23
24 23
24 23
Data
Data
16 15
16 15
16 15
16 15
Rch. data
8 7
8 7
8 7
8 7
0
0
0
0

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