UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 199

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) Port registers (Pxx)
Note It is always 0 and never a pin level that is read out if a port is read during the input mode when P2 and P15 are
Symbol
P12
P1
P2
P3
P4
P5
P8
These registers write the data that is output from the chip when data is output from a port.
If the data is read in the input mode, the pin level is read. If it is read in the output mode, the output latch value is
read
Port registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
set to function as an analog input for a A/D converter.
Note
Note
.
Pmn
7
0
0
0
0
0
0
0
0
1
P121 and P122 are read-only.
Output 0
Output 1
6
0
0
0
0
0
0
0
Output data control (in output mode)
P25
0
0
0
0
0
5
0
Figure 4-33. Format of Port Register (78K0R/IB3)
P24
0
0
0
0
0
4
0
CHAPTER 4 PORT FUNCTIONS
User’s Manual U19678EJ1V1UD
P23
P83
P13
0
0
0
0
3
m = 1 to 5, 8 and 12 ; n = 0 to 5
P122
P22
P32
P12
0
0
0
2
Input low level
Input high level
P121
P21
P31
P41
P51
P81
P11
1
Input data read (in input mode)
P120
P20
P30
P40
P50
P80
P10
0
FFF0CH
FFF02H
FFF03H
FFF04H
FFF05H
FFF08H
Address
FFF01H
00H (output latch) R/W
00H (output latch) R/W
00H (output latch) R/W
00H (output latch) R/W
00H (output latch) R/W
00H (output latch) R/W
Undefined
After reset
R/W
R/W
197
Note