UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 266

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.6.7 Time required for switchover of CPU clock and main system clock
clock can be switched (between the main system clock and the subsystem clock), main system clock can be switched
(between the internal high-speed oscillation clock and the high-speed system clock), and the division ratio of the main
system clock can be changed.
pre-switchover clock for several clocks (see Table 5-7 to Table 5-10).
(CLS) of CKC. Whether the main system clock is operating on the high-speed system clock or internal high-speed
oscillation clock can be ascertained using bit 5 (MCS) of CKC.
264
By setting bits 0 to 2, 4, and 6 (MDIV0 to MDIV2, MCM0, CSS) of the system clock control register (CKC), the CPU
The actual switchover operation is not performed immediately after rewriting to CKC; operation continues on the
Whether the CPU is operating on the main system clock or the subsystem clock
When the CPU clock is switched, the peripheral hardware clock is also switched.
Note
(Remarks 1 and 2 are listed on the next page.)
Table 5-8. Maximum Number of Clocks Required for f
Set Value Before Switchover
Set Value Before Switchover
(f
The 78K0R/IB3 doesn’t have the subsystem clock.
(f
MAIN
MAIN
Clock A
f
f
0
1
MAIN
MAIN
= f
f
= f
IH
Table 5-7. Maximum Time Required for Main System Clock Switchover
MX
IH
Clock A
Clock B
)
MCM0
)
Table 5-9. Maximum Number of Clocks Required for f
f
f
f
f
MX
MX
MX
MX
(changing the division ratio)
>f
<f
>f
<f
IH
IH
IH
IH
Switching directions
CHAPTER 5 CLOCK GENERATOR
1 + f
2f
1 + f
MX
User’s Manual U19678EJ1V1UD
/f
B
MX
IH
/f
A
/f
clock
IH
clock
clock
(f
Clock A
MAIN
0
= f
IH
Set Value After Switchover
Set Value After Switchover
)
MAIN
Clock B
↔ f
f
MCM0
f
MAIN
f
SUB
MX
MAIN
1 + f
1 + f
2f
IH
/f
(Changing the Division Ratio)
A
MX
MX
/f
B
/f
clock
IH
clock
IH
clock
Note
(f
See Table 5-8
See Table 5-9
See Table 5-10
↔ f
MAIN
Clock B
can be ascertained using bit 7
MX
1
= f
Remark
MX
)