PIC16LC774/PQ Microchip Technology, PIC16LC774/PQ Datasheet - Page 91

• Manufacturer Part Number: PIC16LC774/PQ
• Description: IC MCU OTP 4KX14 A/D PWM 44-MQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC774/PQ

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-MQFP, 44-PQFP
• Processor Series: PIC16LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, SSP, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.2.18.15 BUS COLLISION DURING A START
During a START condition, a bus collision occurs if:
a)
b)
During a START condition both the SDA and the SCL
pins are monitored.
If:
then:
The START condition begins with the SDA and SCL
pins de-asserted. When the SDA pin is sampled high,
the baud rate generator is loaded from SSPADD<6:0>
and counts down to 0. If the SCL pin is sampled low
FIGURE 8-35: BUS COLLISION DURING START CONDITION (SDA ONLY)
1999 Microchip Technology Inc.
SDA
SCL
SEN
S
BCLIF
SSPIF
SDA or SCL are sampled low at the beginning of
the START condition
SCL is sampled low before SDA is asserted low.
(Figure
the SDA pin is already low
or the SCL pin is already low,
the START condition is aborted,
and the BCLIF flag is set,
and the SSP module is reset to its IDLE state
(Figure
CONDITION
8-36).
8-35).
condition if SDA = 1, SCL=1
Set SEN, enable start
(Figure
SDA sampled low before
START condition.
S bit and SSPIF set because
SDA = 0, SCL = 1
8-35).
SDA goes low before the SEN bit is set.
Set BCLIF,
S bit and SSPIF set because
SDA = 0, SCL = 1
Advance Information
Set BCLIF.
SSPIF and BCLIF are
cleared in software.
while SDA is high, a bus collision occurs, because it is
assumed that another master is attempting to drive a
data ’1’ during the START condition.
If the SDA pin is sampled low during this count, the
BRG is reset and
(Figure
pin, the SDA pin is asserted low at the end of the BRG
count. The baud rate generator is then reloaded and
counts down to 0, and during this time, if the SCL pins
is sampled as ’0’, a bus collision does not occur. At the
end of the BRG count the SCL pin is asserted low.
Note:
SEN cleared automatically because of bus collision.
SSP module reset into idle state.
8-37). If however a ’1’ is sampled on the SDA
The reason that bus collision is not a factor
during a START condition is that no two
bus masters can assert a START condition
at the exact same time.
master will always assert SDA before the
other. This condition does not cause a bus
collision because the two masters must be
allowed to arbitrate the first address follow-
ing the START condition, and if the
address is the same, arbitration must be
allowed to continue into the data portion,
REPEATED START, or STOP conditions.
SSPIF and BCLIF are
cleared in software.
the SDA line is asserted early
PIC16C77X
DS30275A-page 91
Therefore, one