ATMEGA64-16AJ Atmel, ATMEGA64-16AJ Datasheet - Page 136
![IC MCU AVR 64K 5V 16MHZ 64-TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA64-16AJ
Manufacturer Part Number
ATMEGA64-16AJ
Description
IC MCU AVR 64K 5V 16MHZ 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64-16AJ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Table 61. Waveform Generation Mode Bit Description
Note:
TCCR1B –
Timer/Counter1
Control Register B
TCCR3B –
Timer/Counter3
Control Register B
2490Q–AVR–06/10
Mode
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
The CTCn and PWMn1:0 bit definition names are obsolete. Use the
tion of these bits are compatible with previous versions of the timer.
WGMn3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
WGMn2
(CTCn)
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
• Bit 7 – ICNCn: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise canceler is
activated, the input from the Input Capture pin (ICPn) is filtered. The filter function requires four
successive equal valued samples of the ICPn pin for changing its output. The Input Capture is
therefore delayed by four Oscillator cycles when the noise canceler is enabled.
Bit
0x2E (0x4E)
Read/Write
Initial Value
Bit
(0x8A)
Read/Write
Initial Value
(PWMn1)
WGMn1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
ICNC1
ICNC3
R/W
R/W
(PWMn0)
7
0
7
0
WGMn0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ICES1
ICES3
R/W
R/W
6
0
6
0
Timer/Counter Mode of
Operation
Normal
PWM, Phase Correct, 8-bit
PWM, Phase Correct, 9-bit
PWM, Phase Correct, 10-bit
CTC
Fast PWM, 8-bit
Fast PWM, 9-bit
Fast PWM, 10-bit
PWM, Phase and Frequency
Correct
PWM, Phase and Frequency
Correct
PWM, Phase Correct
PWM, Phase Correct
CTC
(Reserved)
Fast PWM
Fast PWM
R
R
5
–
0
5
–
0
WGM13
WGM33
R/W
R/W
4
0
4
0
WGM
WGM12
WGM32
R/W
R/W
n2:0 definitions. However, the functionality and loca-
3
0
3
0
CS12
CS32
R/W
R/W
2
0
2
0
ICRn
TOP
0xFFFF
0x00FF
0x01FF
0x03FF
OCRnA
0x00FF
0x01FF
0x03FF
ICRn
OCRnA
OCRnA
ICRn
–
ICRn
OCRnA
CS11
CS31
R/W
R/W
1
0
1
0
ATmega64(L)
Update of
OCRn
Immediate
TOP
TOP
TOP
Immediate
BOTTOM
BOTTOM
BOTTOM
BOTTOM
BOTTOM
TOP
TOP
Immediate
–
BOTTOM
BOTTOM
CS10
CS30
R/W
R/W
0
0
0
0
x
at
TCCR1B
TCCR3B
TOVn Flag
Set on
MAX
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
MAX
–
TOP
TOP
136
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