ATMEGA64-16AJ Atmel, ATMEGA64-16AJ Datasheet - Page 314
![IC MCU AVR 64K 5V 16MHZ 64-TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA64-16AJ
Manufacturer Part Number
ATMEGA64-16AJ
Description
IC MCU AVR 64K 5V 16MHZ 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64-16AJ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Data Registers
Reset Register
Programming Enable
Register
2490Q–AVR–06/10
The data registers are selected by the JTAG instruction registers described in section
ming Specific JTAG Instructions” on page
operations are:
•
•
•
•
•
The Reset Register is a Test Data Register used to reset the part during programming. It is
required to reset the part before entering programming mode.
A high value in the Reset Register corresponds to pulling the External Reset low. The part is
reset as long as there is a high value present in the Reset Register. Depending on the Fuse set-
tings for the clock options, the part will remain reset for a Reset Time-out Period (refer to
Sources” on page
latched, so the reset will take place immediately, as shown in
The Programming Enable Register is a 16-bit register. The contents of this register is compared
to the programming enable signature, binary code 1010_0011_0111_0000. When the contents
of the register is equal to the programming enable signature, programming via the JTAG port is
enabled. The register is reset to 0 on Power-on Reset, and should always be reset when leaving
Programming mode.
Figure 150. Programming Enable Register
Reset Register
Programming Enable Register
Programming Command Register
Virtual Flash Page Load Register
Virtual Flash Page Read Register
38) after releasing the Reset Register. The output from this data register is not
TDO
TDI
D
A
T
A
$A370
ClockDR & PROG_ENABLE
=
311. The data registers relevant for programming
D
Q
Programming Enable
Figure 126 on page
ATmega64(L)
256.
“Program-
“Clock
314
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