ATMEGA64-16AJ Atmel, ATMEGA64-16AJ Datasheet - Page 247
![IC MCU AVR 64K 5V 16MHZ 64-TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA64-16AJ
Manufacturer Part Number
ATMEGA64-16AJ
Description
IC MCU AVR 64K 5V 16MHZ 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64-16AJ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ADCSRB – ADC
Control and Status
Register B
2490Q–AVR–06/10
• ADC9:0: ADC Conversion Result
These bits represent the result from the conversion, as detailed in
page
• Bits 7:3 – Res: Reserved Bits
These bits are reserved bits in the ATmega64 and will always read as zero.
• Bit 2:0 – ADTS2:0: ADC Auto Trigger Source
If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger
an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion
will be triggered by the rising edge of the selected interrupt flag. Note that switching from a trig-
ger source that is cleared to a trigger source that is set, will generate a positive edge on the
trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running
mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set
Figure 122. ADC Auto Trigger Source Selections
Bit
(0x8E)
Read/Write
Initial Value
ADTS2
242.
0
0
0
0
1
1
1
1
R
7
–
0
ADTS1
R
6
–
0
0
0
1
1
0
0
1
1
R
5
–
0
ADTS0
R
4
–
0
0
1
0
1
0
1
0
1
R
3
–
0
Trigger Source
Free Running mode
Analog Comparator
External Interrupt Request 0
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
ADTS2
R/W
2
0
ADTS1
R/W
1
0
“ADC Conversion Result” on
ATmega64(L)
ADTS0
R/W
0
0
ADCSRB
.
247
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