ATMEGA64-16AJ Atmel, ATMEGA64-16AJ Datasheet - Page 57
![IC MCU AVR 64K 5V 16MHZ 64-TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA64-16AJ
Manufacturer Part Number
ATMEGA64-16AJ
Description
IC MCU AVR 64K 5V 16MHZ 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64-16AJ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
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Price
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WDTCR – Watchdog
Timer Control Register
2490Q–AVR–06/10
Table 21. WDT Configuration as a Function of the Fuse Settings of M103C and WDTON
Figure 28. Watchdog Timer
• Bits 7..5 – Res: Reserved Bits
These bits are reserved bits in the ATmega64 and will always read as zero.
• Bit 4 – WDCE: Watchdog Change Enable
This bit must be set when the WDE bit is written to logic zero. Otherwise, the Watchdog will not
be disabled. Once written to one, hardware will clear this bit after four clock cycles. Refer to the
description of the WDE bit for a Watchdog disable procedure. In Safety Level 1 and 2, this bit
must also be set when changing the prescaler bits.
Configuration of the Watchdog Timer” on page 60.
• Bit 3 – WDE: Watchdog Enable
When the WDE is written to logic one, the Watchdog Timer is enabled, and if the WDE is written
to logic zero, the Watchdog Timer function is disabled. WDE can only be cleared if the WDCE bit
Bit
0x21 (0x41)
Read/Write
Initial Value
M103C
Unprogrammed
Unprogrammed
Programmed
Programmed
R
7
–
0
WDTON
Unprogrammed
Programmed
Unprogrammed
Programmed
OSCILLATOR
WATCHDOG
R
6
–
0
R
5
–
0
Safety
Level
1
2
0
2
WDCE
R/W
4
0
WDT
Initial
State
Disabled
Enabled
Disabled
Enabled
WDE
R/W
3
0
See “Timed Sequences for Changing the
WDP2
R/W
Timed
enabled
Timed
sequence
enabled
How to
Disable the
WDT
sequence
Always
Always
2
0
WDP1
R/W
1
0
ATmega64(L)
WDP0
R/W
How to
Change
Time-out
Timed
sequence
Timed
sequence
No restriction
Timed
sequence
0
0
WDTCR
57
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