MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 445

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MC68HC16Z1CFC16

Manufacturer Part Number
MC68HC16Z1CFC16
Description
IC MPU 1K RAM 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CFC16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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PCLKS — PCLK Pin State (Read Only)
I4/O5 — Input Capture 4/Output Compare 5
PACLK[1:0] — Pulse Accumulator Clock Select (Gated Mode)
PACNT — Pulse Accumulator Counter
D.8.8 Input Capture Registers 1–3
TIC[1:3] — Input Capture Registers 1–3
D.8.9 Output Compare Registers 1–4
TOC[1:4] — Output Compare Registers 1–4
M68HC16 Z SERIES
USER’S MANUAL
Table D-45
Eight-bit read/write counter used for external event counting or gated time accumula-
tion.
The input capture registers are 16-bit read-only registers used to latch the value of
TCNT when a specified transition is detected on the corresponding input capture pin.
They are reset to $FFFF.
The output compare registers are 16-bit read/write registers which can be used as out-
put waveform controls or as elapsed time indicators. For output compare functions,
they are written to a desired match value and compared against TCNT to control spec-
ified pin actions. They are reset to $FFFF.
0 = Output compare 5 enabled
1 = Input capture 4 enabled
shows the PACLK[1:0] bit field effects.
PAMOD
0
0
1
1
PACLK[1:0]
Freescale Semiconductor, Inc.
Table D-44 PAMOD and PEDGE Effects
For More Information On This Product,
PEDGE
00
01
10
11
Table D-45 PACLK[1:0] Effects
0
1
0
1
Go to: www.freescale.com
REGISTER SUMMARY
Pulse Accumulator Clock Selected
Same clock used to increment TCNT
PAI falling edge increments counter
PAI rising edge increments counter
System clock divided by 512
Zero on PAI inhibits counting
One on PAI inhibits counting
External clock, PCLK
TOF flag from TCNT
Effect
$YFF914 – $YFF91A
$YFF90E – $YFF912
D-71

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