MC912D60ACPV8 Freescale Semiconductor, MC912D60ACPV8 Datasheet - Page 60

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MC912D60ACPV8

Manufacturer Part Number
MC912D60ACPV8
Description
IC MCU 6K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60ACPV8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Pinout and Signal Descriptions
3.6.12 Port Pull-Up Pull-Down and Reduced Drive
Technical Data
60
Port A
Port B
Port E:
PE7,
PE[1:0]
PE[6:4]
Port G
Port H
Port P
PS[1:0]
PS[3:2]
PS[7:4]
Port T
PortCAN[1]:
PortCAN[0]:
Port
Port AD0
Port AD1
1. Pull-Up when PGUPD input pin is high, Pull-down when PGUPD input pin is low.
2. Pull-Up when PHUPD input pin is high, Pull-down when PHUPD input pin is low.
PE[3:2]
TxCAN
RxCAN
CAN[7:2]
Name
In the 80-pin version, PGUPD is internally tied to VDD, hence PG4 is pulled up.
In the 80-pin version, PHUPD is internally tied to VSS, hence PH4 is pulled down.
Port
Pull-up
Pull-up
Pull-up
Pull-up
None
Pull-up or
Pull-up or
Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
None
Pull-up
Pull-up
None
None
Input Loads
Resistive
Pull-
down
Pull-
down
Table 3-4. Port Pull-Up, Pull-Down and Reduced Drive Summary
(1)
(2)
PUCR ($000C)
PUCR ($000C)
PUCR ($000C)
PUCR ($000C)
PUCR ($000C)
PUCR ($000C)
PWCONT ($0054) PUPP
PURDS ($00D9)
PURDS ($00D9)
PURDS ($00D9)
TMSK2 ($008D)
Always enabled
PCTLCAN
MCU ports can be configured for internal pull-up. To reduce power
consumption and RFI, the pin output drivers can be configured to
operate at a reduced drive level. Reduced drive causes a slight increase
in transition time depending on loading and should be used only for ports
which have a light loading.
down default status and controls.
($013D)
(Address)
Register
Pinout and Signal Descriptions
Enable Bit
PUPA
PUPB
PUPE
PUPE
PUPG
PUPH
PUPS0
PUPS1
PUPS2
PUPT
PUPCAN Disabled
Bit Name
Disabled
Disabled
Enabled
Enabled
Enabled
Enabled
Disabled
Disabled
Disabled
Disabled
Disabled
Table 3-4
Reset
State
RDRIV ($000D)
RDRIV ($000D)
RDRIV ($000D)
RDRIV ($000D)
RDRIV ($000D)
RDRIV ($000D)
PWCONT ($0054) RDPP
PURDS ($00DB)
PURDS ($00DB)
PURDS ($00DB)
TMSK2 ($008D)
PCTLCAN ($013D) RDPCAN Full drive
summarizes the port pull-up/pull-
(Address)
Register
Reduced Drive Control Bit
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
RDPA
RDPB
RDPE
RDPE
RDPG
RDPH
RDPS0
RDPS1
RDPS2
TDRB
Bit Name
Full drive
Full drive
Full drive
Full drive
Full drive
Full drive
Full drive
Full drive
Full drive
Full drive
Full drive
Reset
State

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