MPC5553MZQ132 Freescale Semiconductor, MPC5553MZQ132 Datasheet - Page 44

• Manufacturer Part Number: MPC5553MZQ132
• Description: IC MCU MPC5553 REV A 324-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC55xx Qorivvar

Specifications of MPC5553MZQ132

• Core Processor: e200z6
• Core Size: 32-Bit
• Speed: 132MHz
• Connectivity: CAN, EBI/EMI, Ethernet, SCI, SPI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 220
• Program Memory Size: 1.5MB (1.5M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.65 V
• Data Converters: A/D 40x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC5xxx
• Core: e200z6
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 7-Wire, DSPI, ESCI
• Maximum Clock Frequency: 132 MHz
• Number Of Timers: 56
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: MPC5553EVBISYS - KIT EVAL ISYSTEMS MPC5553MPC5553EVBGHS - KIT EVAL GREEN HILLS SOFTWAREMPC5553EVB - KIT EVAL MPC5553MZP132MPC5553EVBE - BOARD EVAL FOR MPC5553
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Electrical Characteristics
3.13.9
44
1
2
Spec
SS timing specified at V
varies depending on track delays, master pad delays, and slave pad delays.
FCK duty cycle is not 50% when it is generated through the division of the system clock by an odd number.
2
3
4
5
6
7
8
External device data sample at
FCK period (t
Clock (FCK) high time
Clock (FCK) low time
SDS lead / lag time
SDO lead / lag time
EQADC data setup time (inputs)
EQADC data hold time (inputs)
EQADC data sample at
eQADC SSI Timing
FCK falling-edge
FCK rising-edge
FCK
Rating
DDEH
= 1
SDO
SDS
FCK
÷
SDI
= 3.0–5.25 V, T
f
FCK
Table 27. EQADC SSI Timing Characteristics
)
MPC5553 Microcontroller Data Sheet, Rev. 3.0
1, 2
Figure 27. EQADC SSI Timing
A
= T
L
Symbol
t
t
t
t
t
t
SDO_LL
to T
SDS_LL
EQ_SU
EQ_HO
5
FCKHT
6
FCKLT
t
FCK
3
H
, and CL = 25 pF with SRC = 0b11. Maximum operating frequency
2
1st (MSB)
4
t
t
SYS_CLK
SYS_CLK
7
Minimum
1st (MSB) 2nd
–7.5
–7.5
22
2
1
8
− 6.5
− 6.5
2nd
Typical
—
—
—
—
—
—
—
25th
25th
9 × (t
8 × (t
26th
Maximum
SYS_CLK
SYS_CLK
Freescale Semiconductor
+7.5
+7.5
17
—
—
4
5
+ 6.5)
+ 6.5)
26th
t
SYS_CLK
Unit
ns
ns
ns
ns
ns
ns