MPC5553MZQ132 Freescale Semiconductor, MPC5553MZQ132 Datasheet - Page 64

• Manufacturer Part Number: MPC5553MZQ132
• Description: IC MCU MPC5553 REV A 324-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC55xx Qorivvar

Specifications of MPC5553MZQ132

• Core Processor: e200z6
• Core Size: 32-Bit
• Speed: 132MHz
• Connectivity: CAN, EBI/EMI, Ethernet, SCI, SPI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 220
• Program Memory Size: 1.5MB (1.5M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.65 V
• Data Converters: A/D 40x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC5xxx
• Core: e200z6
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 7-Wire, DSPI, ESCI
• Maximum Clock Frequency: 132 MHz
• Number Of Timers: 56
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: MPC5553EVBISYS - KIT EVAL ISYSTEMS MPC5553MPC5553EVBGHS - KIT EVAL GREEN HILLS SOFTWAREMPC5553EVB - KIT EVAL MPC5553MZP132MPC5553EVBE - BOARD EVAL FOR MPC5553
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Revision History for the MPC5553 Data Sheet
64
Table 10
Table 11
Table 12
Table 13
Table 14
Table 15
Table 16
Location
I/O Pad Average DC Current: Added (T
V
FMPLL Electrical Characteristics:
eQADC Conversion Specifications: Added (T
Flash Program and Erase Specifications:
Flash EEPROM Module Life:
FLASH BIU Settings vs. Frequency of Operations:
DD3
• Spec 1, footnote 1 in column 2: ‘PLL reference frequency range’: Added that reads ‘Nominal crystal and external
• Spec 21, column 2: Changed f
• Spec 21: Changed column 5 from ‘f
• Spec 22: Changed column 4, Max Value from f
• Added (T
• Specs 9 and 10: Changed typical values for the H7Fa Flash pre-program and erase times:
• Spec 8, 128KB block pre-program and erase time:
• Moved footnote 1 from the table title to directly after the ‘Typical’ in the column 5 header.
• Footnote 2: Changed from: ‘Initial factory condition: ≤ 100 program/erase cycles, 25
• Replaced (Full Temperature Range) with (T
• Spec 1b, Min. column value changed from 10,000 to 1,000.
• ‘Added footnote 1 to the end of the table title, The footnote reads: ‘Illegal combinations exist. Use entries from
• Moved footnote 2:’ For maximum flash performance, set to 0b11’ to the ‘DPFEN’ column header.
• Deleted the x-refs in the ‘DPFEN’ column for the rows.
• Created a x-ref for footnote 2 and inserted in the ‘IPFEN’ column header.
• Deleted the x-refs in the ‘IPFEN’ column for the rows.
• Moved footnote 3:’ For maximum flash performance, set to 0b110’ to the ‘PFLIM’ column header.
• Deleted the x-refs in the ‘PFLIM’ column for the rows.
• Moved footnote 4:’ For maximum flash performance, set to 0b1’ to the ‘BFEN’ column header.
• Deleted the x-refs in the ‘BFEN’ column for the rows.
• Changed footnotes 1, 5, and 6 to become footnotes 5, 6, and 7
Pad Average DC Current: Added (T
reference values are worst-case not more than 1%. The device operates correctly if the frequency remains within
± 5% of the specification limit. This tolerance range allows for a slight frequency drift of the crystals over time.
The designer must thoroughly understand the drift margin of the source clock.‘
added the same equation but substituted f
f
f
dual controller (1:1) mode is (f
80 MHz minimum system frequency.‘To: ‘Initial factory condition: ≤ 100 program/erase cycles, 25
typical supply voltage measured at a minimum system frequency of 80 MHz.’
the same row in this table.’
ico
ico
-- 48 KB: from 435 to 345
-- 64 KB: from 525 to 415
-- Typical column values from 675 to 500.
-- Initial Max column from 1800 to 1250.
-- Max column values from 15,000 to 7,500.
-- footnote 5
-- footnote 6 102 MHz parts allow for 100 MHz system clock + 2% FM.
-- footnote 7 132 MHz parts allow for 128 MHz system clock + 2% FM.
= [ f
= [ f
Table 33. Table and Figure Changes Between Rev. 2.0 and 3.0 (continued)
ref_crystal
ref_ext
A
= T
× (MFD + 4) ] ÷ (PREDIV + 1)
L
– T
× (MFD + 4) ] ÷ (PREDIV + 1)
82 MHz parts allow for 80 MHz system clock + 2% frequency modulation (FM).
H
) to the table title.
MPC5553 Microcontroller Data Sheet, Rev. 3.0
MAX
ref_crystal
A
÷ 2) and the predivider set to 1 (FMPLL_SYNCR[PREDIV] = 0b001).’
= T
A
SYS
= T
L
A
’ MHz’ to: ‘f
to f
– T
L
= T
Description of Changes
– T
ref_ext
ref
H
A
L
)
= T
H
in ICO frequency equation, and
– T
)
MAX
for f
L
H
– T
) to the table title.
MAX
to 20, and added footnote 17 to read, ‘Maximum value for
ref
H
’.
) in the table title.
for the external reference clock, giving:
o
C, typical supply voltage,
Freescale Semiconductor
o
C, using a