SAK-XC161CS-32F40F BB-A Infineon Technologies, SAK-XC161CS-32F40F BB-A Datasheet - Page 11

• Manufacturer Part Number: SAK-XC161CS-32F40F BB-A
• Description: IC MCU 16BIT 256KB TQFP-144-19
• Manufacturer: Infineon Technologies
• Series: XC16xr

Specifications of SAK-XC161CS-32F40F BB-A

• Core Processor: C166SV2
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 99
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.7 V
• Data Converters: A/D 12x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LFQFP
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: ASC, CAN, IIC, SSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 99
• Number Of Timers: 9
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Packages: PG-TQFP-144
• Max Clock Frequency: 40.0 MHz
• Sram (incl. Cache): 12.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 12
• Program Memory: 256.0 KByte
• For Use With: MCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: KX161CS32F40FBBANT; KX161CS32F40FBBAXT; SAKXC161CS32F40FBBAT; SP000098775; SP000224544

Table 2
Sym-
bol
P20.12 3
NMI
P6
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
Data Sheet
Pin
Num.
4
7
8
9
10
11
12
13
14
Pin Definitions and Functions
Input
Outp.
IO
I
IO
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
I
I/O
O/I
I/O
O
I/O
Function
For details, please refer to the description of P20.
Non-Maskable Interrupt Input. A high to low transition at this
pin causes the CPU to vector to the NMI trap routine. When
the PWRDN (power down) instruction is executed, the NMI
pin must be low in order to force the XC161 into power down
mode. If NMI is high, when PWRDN is executed, the part will
continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
Port 6 is an 8-bit bidirectional I/O port. Each pin can be
programmed for input (output driver in high-impedance
state) or output (configurable as push/pull or open drain
driver). The input threshold of Port 6 is selectable (standard
or special).
The Port 6 pins also serve for alternate functions:
CS0
CC0IO
CS1
CC1IO
CS2
CC2IO
CS3
CC3IO
CS4
CC4IO
HOLD
CC5IO
HLDA
CC6IO
BREQ
CC7IO
Chip Select 0 Output,
CAPCOM1: CC0 Capture Inp./Compare Output
Chip Select 1 Output,
CAPCOM1: CC1 Capture Inp./Compare Output
Chip Select 2 Output,
CAPCOM1: CC2 Capture Inp./Compare Output
Chip Select 3 Output,
CAPCOM1: CC3 Capture Inp./Compare Output
Chip Select 4 Output,
CAPCOM1: CC4 Capture Inp./Compare Output
External Master Hold Request Input,
CAPCOM1: CC5 Capture Inp./Compare Output
Hold Acknowledge Output (master mode) or
Input (slave mode),
CAPCOM1: CC6 Capture Inp./Compare Output
Bus Request Output,
CAPCOM1: CC7 Capture Inp./Compare Output
9
General Device Information
XC161CS-32F
Derivatives
V1.2, 2006-08