SAK-XC161CS-32F40F BB-A Infineon Technologies, SAK-XC161CS-32F40F BB-A Datasheet - Page 21

• Manufacturer Part Number: SAK-XC161CS-32F40F BB-A
• Description: IC MCU 16BIT 256KB TQFP-144-19
• Manufacturer: Infineon Technologies
• Series: XC16xr

Specifications of SAK-XC161CS-32F40F BB-A

• Core Processor: C166SV2
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 99
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.7 V
• Data Converters: A/D 12x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LFQFP
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: ASC, CAN, IIC, SSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 99
• Number Of Timers: 9
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Packages: PG-TQFP-144
• Max Clock Frequency: 40.0 MHz
• Sram (incl. Cache): 12.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 12
• Program Memory: 256.0 KByte
• For Use With: MCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: KX161CS32F40FBBANT; KX161CS32F40FBBAXT; SAKXC161CS32F40FBBAT; SP000098775; SP000224544

3
The architecture of the XC161 combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a very well-balanced way. In
addition, the on-chip memory blocks allow the design of compact systems-on-silicon with
maximum performance (computing, control, communication).
The on-chip memory blocks (program code-memory and SRAM, dual-port RAM, data
SRAM) and the set of generic peripherals are connected to the CPU via separate buses.
Another bus, the LXBus, connects additional on-chip resources as well as external
resources (see
This bus structure enhances the overall system performance by enabling the concurrent
operation of several subsystems of the XC161.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the XC161.
Figure 3
Data Sheet
Debug Support
Clock Generator
P 20 P 9 P 7 Port 6
10-Bit
12 Ch
8-Bit/
ADC
Osc / PLL
256 Kbytes
ProgMem
6
PSRAM
OCDS
Functional Description
Flash
Block Diagram
GPT
6
Figure
T2
T3
T4
T5
T6
4
USART
BRGen BRGen BRGen BRGen
ASC0
RTC
3).
8
USART
ASC1
WDT
Port 5
12
SSC0
SPI
Port 4
C166SV2 - Core
8
SSC1
Interrupt & PEC
SPI
DPRAM
19
CPU
Port 3
CC1
T0
T1
15
CC2
Port 2
T7
T8
Interrupt Bus
8
BRGen
IIC
PORT1
Functional Description
16
XC161CS-32F
LXBus Control
External Bus
DSRAM
Derivatives
Control
V1.2, 2006-08
EBC
PORT0
MCB04323_X132
Twin
A B
16
CAN