DSP56311VL150 Freescale Semiconductor, DSP56311VL150 Datasheet - Page 4

IC DSP 24BIT FIXED POINT 196-BGA

DSP56311VL150

Manufacturer Part Number
DSP56311VL150
Description
IC DSP 24BIT FIXED POINT 196-BGA
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheet

Specifications of DSP56311VL150

Interface
Host Interface, SSI, SCI
Clock Rate
150MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
384kB
Voltage - I/o
3.30V
Voltage - Core
1.80V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
196-MAPBGA
Package
196MA-BGA
Numeric And Arithmetic Format
Fixed-Point
Maximum Speed
150 MHz
Ram Size
384 KB
Device Million Instructions Per Second
150 MIPS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Target Applications
DSP56311 applications require high performance, low power, small packaging, and a large amount of internal
memory. The EFCOP can accelerate general filtering applications. Examples include:
Product Documentation
The documents listed in Table 2 are required for a complete description of the DSP56311 device and are necessary
to design properly with the part. Documentation is available from a local Freescale distributor, a Freescale
semiconductor sales office, or a Freescale Semiconductor Literature Distribution Center. For documentation
updates, visit the Freescale DSP website. See the contact information on the back cover of this document.
iv
DSP56311
User’s Manual
DSP56300 Family
Manual
Application Notes
Power Dissipation
External Memory
Name
Expansion
Packaging
Wireless and wireline infrastructure applications
Multi-channel wireless local loop systems
DSP resource boards
High-speed modem banks
IP telephony
Feature
Detailed functional description of the DSP56311 memory configuration,
operation, and register programming
Detailed description of the DSP56300 family processor core and instruction set
Documents describing specific applications or optimized device operation
including code examples
• Data memory expansion to two 256 K × 24-bit word memory spaces using the standard external address
• Program memory expansion to one 256 K × 24-bit words memory space using the standard external
• External memory expansion port
• Chip select logic for glueless interface to static random access memory (SRAMs)
• Internal DRAM controller for glueless interface to dynamic random access memory (DRAMs) up to 100
• Very low-power CMOS design
• Wait and Stop low-power standby modes
• Fully static design specified to operate down to 0 Hz (dc)
• Optimized power management circuitry (instruction-dependent, peripheral-dependent, and mode-
• Molded array plastic-ball grid array (MAP-BGA) package in lead-free or lead-bearing versions.
lines
address lines
MHz operating frequency
dependent)
Table 1. DSP56311 Features (Continued)
Table 2. DSP56311 Documentation
DSP56311 Technical Data, Rev. 8
Description
Description
DSP56311UM
DSP56300FM
See the DSP56311 product website
Order Number
Freescale Semiconductor

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