MCF5216CVF66 Freescale Semiconductor, MCF5216CVF66 Datasheet - Page 70

• Manufacturer Part Number: MCF5216CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5216CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• Ram Memory Size: 64KB
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Operating Temperature Range: -40°C To +85°C
• No. Of Pins: 256
• Rohs Compliant: No
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

ColdFire Core
Information loaded into D1 defines the local memory hardware configuration as shown in the figure below.
2-24
DEBUG
Field
11–8
7–4
3–0
ISA
31–30
29–28
CCAS
Reset
Reset
CLSZ
BDM: Load: 0x1 (D1)
Field
W
W
R
R
Reserved.
ISA revision. Defines the instruction-set architecture (ISA) revision level implemented in ColdFire processor core.
0000 ISA_A
0001 ISA_B
0010 ISA_C
1000 ISA_A+ (This is the value used for this device.)
Else Reserved
Debug module revision number. Defines revision level of the debug module used in the ColdFire processor core.
0000 DEBUG_A
0001 DEBUG_B
0010 DEBUG_C
0011 DEBUG_D
0100 DEBUG_E
1001 DEBUG_B+
1011 DEBUG_D+
1111 DEBUG_D+PST Buffer
Else Reserved
Store: 0x1 (D1)
31
15
0
0
MBSZ
Cache line size. This field is fixed to a hex value of 0x0 indicating a 16-byte cache line size.
Configurable cache associativity.
00
01
Else Reserved for future use
CLSZ
30
14
0
0
Four-way
Direct mapped (This is the value used for this device)
Table 2-9. D0 Hardware Configuration Info Field Description (continued)
Table 2-10. D1 Hardware Configuration Information Field Description
29
13
0
0
CCAS
UCAS
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
28
12
1
1
Figure 2-19. D1 Hardware Configuration Info
27
11
0
0
0
26
10
0
0
0
CCSZ
25
1
0
0
9
Description
24
1
0
0
Description
8
23
1
1
7
22
0
0
6
FLASHSZ
SRAMSZ
21
1
5
0
20
1
0
4
19
0
0
3
Freescale Semiconductor
Access: User read-only
18
0
0
0
0
2
BDM read-only
17
0
0
0
0
1
16
0
0
0
0
0