TWR-MCF51MM Freescale Semiconductor, TWR-MCF51MM Datasheet - Page 18

• Manufacturer Part Number: TWR-MCF51MM
• Description: TOWER SYSTEM BOARD MCF51MM
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®, Flexis™r
• Type: MCUr

Specifications of TWR-MCF51MM

• Contents: Board, 3 Modules, MED-EKG Kit, Cables, Documentation, DVD
• Product: Microcontroller Modules
• Data Bus Width: 32 bit
• Core Processor: MCF51MM
• Clock Speed: 32 KHz
• Interface Type: RS232, RS485, CAN , USB
• Flash: 256 KB
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Freescale
• Core Architecture: Coldfire
• Core Sub-architecture: Coldfire V1
• Silicon Core Number: MCF51
• Silicon Family Name: Flexis - MCF51MM
• Rohs Compliant: Yes
• For Use With/related Products: Freescale Tower System, MCF51MM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Characteristics
For most applications, P
(if P
Solving
where K is a constant pertaining to the particular part. K can be determined from
P
solving
3.4
Although damage from static discharge is much less common on these devices than on early CMOS
circuits, normal handling precautions should be used to avoid exposure to static discharge. Qualification
tests are performed to ensure that these devices can withstand exposure to reasonable levels of static
without suffering any permanent damage.
All ESD testing is in conformity with CDF-AEC-Q00 Stress Test Qualification for Automotive Grade
Integrated Circuits. (http://www.aecouncil.com/) This device was qualified to AEC-Q100 Rev E.
A device is considered to have failed if, after exposure to ESD pulses, the device no longer meets the
device specification requirements. Complete dc parametric and functional testing is performed per the
applicable device specification at room temperature followed by hot temperature, unless specified
otherwise in the device specification.
18
D
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
(at equilibrium) for a known T
I/O
#
1
2
is neglected) is:
Equation 1
Human Body
Machine
Latch-up
Equation 1
ESD Protection Characteristics
Human Body Model (HBM)
Machine Model (MM)
Model
and
and
Series Resistance
Storage Capacitance
Number of Pulse per pin
Series Resistance
Storage Capacitance
Number of Pulse per pin
Minimum input voltage limit
Maximum input voltage limit
Equation 2
I/O
Equation 2
Table 8. ESD and Latch-Up Protection Characteristics
 P
Rating
Table 7. ESD and Latch-up Test Conditions
int
K = P
A
and can be neglected. An approximate relationship between P
iteratively for any value of T
. Using this value of K, the values of P
for K gives:
D
P
Description
 (T
D
= K  (T
A
+ 273C) + 
J
+ 273C)
Symbol
JA
V
V
HBM
MM
 (P
D
A
)
.
2
2000
200
Min
Symbol
R1
R1
—
—
—
—
C
C
D
and T
Equation 3
Max
—
—
J
Value
1500
–2.5
100
200
7.5
can be obtained by
Freescale Semiconductor
3
0
3
Unit
V
V
by measuring
Unit
pF
pF
—
—


V
V
D
C
T
T
and T
Eqn. 2
Eqn. 3
J