TWR-MCF51MM Freescale Semiconductor, TWR-MCF51MM Datasheet - Page 37

TOWER SYSTEM BOARD MCF51MM

TWR-MCF51MM

Manufacturer Part Number
TWR-MCF51MM
Description
TOWER SYSTEM BOARD MCF51MM
Manufacturer
Freescale Semiconductor
Series
ColdFire®, Flexis™r
Type
MCUr
Datasheets

Specifications of TWR-MCF51MM

Contents
Board, 3 Modules, MED-EKG Kit, Cables, Documentation, DVD
Product
Microcontroller Modules
Data Bus Width
32 bit
Core Processor
MCF51MM
Clock Speed
32 KHz
Interface Type
RS232, RS485, CAN , USB
Flash
256 KB
Operating Supply Voltage
3.3 V
Silicon Manufacturer
Freescale
Core Architecture
Coldfire
Core Sub-architecture
Coldfire V1
Silicon Core Number
MCF51
Silicon Family Name
Flexis - MCF51MM
Rohs Compliant
Yes
For Use With/related Products
Freescale Tower System, MCF51MM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.10
1
Freescale Semiconductor
10
11 Lock frequency tolerance
12 Lock time
13
14
#
1 Internal reference startup time
2
3
4
5
6
7
8 VCO operating frequency
9 PLL reference frequency range
This should not exceed the maximum CPU frequency for this device which is 50.33 MHz.
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Average internal reference
frequency
DCO output frequency range —
trimmed
Resolution of trimmed DCO
output frequency at fixed voltage
and temperature
Total deviation of trimmed DCO
output frequency over voltage and
temperature
Acquisition time
Long term Jitter of DCO output clock (averaged over
2mS interval)
Jitter of PLL output clock
measured over 625ns
Loss of external clock minimum frequency - RANGE =
0
Loss of external clock minimum frequency - RANGE =
1
MCG and External Oscillator (XOSC) Characteristics
4
Table 18. MCG (Temperature Range = –40 to 105
5
Rating
factory trimmed at
VDD=3.0 V and
temp=25C
user trimmed
Low range
(DRS=00)
Mid range
(DRS=01)
High range
(DRS=10)
with FTRIM
without FTRIM
over voltage and
temperature
over fixed voltage
and temp range
of 0 – 70 C
FLL
PLL
Long term
Entry
Exit
FLL
PLL
7
2
3
6
1
f
f
pll_jitter_625
t
t
Symbol
pll_acquire
fll_acquire
f
t
f
f
t
loc_high
dco_res_t
C
f
pll_lock
loc_low
f
D
fll_lock
t
f
pll_ref
D
dco_t
int_ft
f
irefst
dco_t
Jitter
vco
ns
lock
unl
(16/5) x
1.49
4.47
(3/5) x
31.25
Min
f
f
7.0
1.0
int_t
int_t
16
32
40
°
C Ambient)
Typical
0.566
31.25
0.1
0.2
0.5
1.0
0.02
55
4
1075(1/
1075(1/
t
t
pll_acquire+
fll_acquire+
39.0625
2.98
5.97
0.2
0.4
Max
55.0
100
0.2
2.0
2
1
20
40
60
1
1
f)
Electrical Characteristics
f
f
pll_re
int_t)
%f
%f
%f
MHz
MHz
MHz
Unit
%f
kHz
kHz
kHz
ms
s
%
s
dco
dco
dco
pll
C
D
C
C
C
C
C
C
C
C
C
D
C
D
D
D
D
D
D
D
D
D
P
37

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