TWR-MCF51MM Freescale Semiconductor, TWR-MCF51MM Datasheet - Page 45

TOWER SYSTEM BOARD MCF51MM

TWR-MCF51MM

Manufacturer Part Number
TWR-MCF51MM
Description
TOWER SYSTEM BOARD MCF51MM
Manufacturer
Freescale Semiconductor
Series
ColdFire®, Flexis™r
Type
MCUr
Datasheets

Specifications of TWR-MCF51MM

Contents
Board, 3 Modules, MED-EKG Kit, Cables, Documentation, DVD
Product
Microcontroller Modules
Data Bus Width
32 bit
Core Processor
MCF51MM
Clock Speed
32 KHz
Interface Type
RS232, RS485, CAN , USB
Flash
256 KB
Operating Supply Voltage
3.3 V
Silicon Manufacturer
Freescale
Core Architecture
Coldfire
Core Sub-architecture
Coldfire V1
Silicon Core Number
MCF51
Silicon Family Name
Flexis - MCF51MM
Rohs Compliant
Yes
For Use With/related Products
Freescale Tower System, MCF51MM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.13
Table 23
Freescale Semiconductor
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
1
2
3
4
No.
Numbers in this column identify elements in
All timing is shown with respect to 20% V
rate control disabled and high drive strength enabled for SPI output pins.
Time to data active from high-impedance state.
Hold time to high-impedance state.
10
11
12
13
1
2
3
4
5
6
7
8
9
and
SPI Characteristics
1
SPSCK period
Slave MISO disable time
Operating frequency
Enable lead time
Enable lag time
Clock (SPSCK) high or low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time
Data valid (after SPSCK edge)
Data hold time (outputs)
Rise time
Fall time
Figure 15
Characteristic
through
3
Figure 18
4
2
DD
Figure 15
and 70% V
Master
Master
Master
Master
Master
Master
Master
Master
Master
Output
Output
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Input
Input
describe the timing requirements for the SPI system.
Table 23. SPI Timing
through
DD
t
Symbol
, unless noted; 100 pF load on all SPI pins. All timing assumes slew
WSPSCK
t
SPSCK
t
t
Lead
t
t
t
t
t
t
f
Lag
t
t
t
HO
RO
t
SU
SU
dis
FO
op
t
t
HI
HI
RI
FI
a
v
Figure
18.
f
t
t
Bus
cyc
cyc
Min
12
12
15
15
25
/2048
0
2
4
1
1
0
0
0
–30
– 30
1024 t
t
t
cyc
cyc
f
f
2048
Max
Bus
Bus
25
25
25
25
1
1
– 25
– 25
/2
/4
cyc
Electrical Characteristics
t
t
SPSCK
SPSCK
Unit
t
t
t
t
t
t
Hz
Hz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
cyc
cyc
cyc
cyc
C
D
D
D
D
D
D
D
D
D
D
D
D
D
45

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