AT86RF211SAH-R Atmel, AT86RF211SAH-R Datasheet - Page 51

IC RF TXRX FSK 400-950MHZ 48TQFP

AT86RF211SAH-R

Manufacturer Part Number
AT86RF211SAH-R
Description
IC RF TXRX FSK 400-950MHZ 48TQFP
Manufacturer
Atmel
Datasheet

Specifications of AT86RF211SAH-R

Frequency
400MHz ~ 950MHz
Data Rate - Maximum
100kbps
Modulation Or Protocol
FSK
Applications
ISM
Power - Output
7dBm ~ 12dBm
Sensitivity
-107dBm
Voltage - Supply
2.4 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Memory Size
-
Current - Transmitting
-
Current - Receiving
-
Table 2-31.
2.5.2.10
Table 2-32.
Table 2-33.
5348B–WIRE–03/06
Name
RATECHK
RATE
RATETOL
Name
ADDL
ADD
Name
nbit
init
Wake Up Address Register (WUA)
Number of bits
5
20
WUR Detailed Description
WUA Overview
WUA Detailed Description
Number of bits
1
10
5
In this register, the last bit of the address field is not taken into account the address field
that is received is being tested. Thus, the last bit must be programmed and counted in
the address length but it can be either 0 or 1.
Comments
Data rate check
the data rate is automatically extracted from the HEADER field.
the data rate can be compared to RATE with a tolerance of plus or minus RATETOL.
Data rate is computed from a unit of 1.56 µs (Reference clock divided by 16).
0: data rate not checked.
1: data rate check done (header ignored if check fails).
Data rate value
0d: min value = 1 × 1.56 µs
(1023)
Data rate tolerance
0d: min value = 0 × 1.56 µs
(31)
Comments
Wake-up address length
0: wake-up address length = 1 bit
1: wake-up address length = 2 bits
(19)
>(19)
Wake-up address
If wake-up address length is less than 20 bits, MSB bits are ignored
10
: max value = 31 × 1.56 µs
10
10
: max value = 1024 × 1.56 µs
10
: wake-up address length = 20 bits
: forbidden
(01001)
ADDL
24-20
2
(0f0f0)
ADD
19-0
AT86RF211S
reset value: 64 × 1.56 µs
reset value: 8 × 1.56 µs
16
reset value: (0f0f0)
reset value: 10 bits
reset value: (63)
reset value: (8)
reset value: 0
10
10
16
51

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