XRT94L31IB-L Exar Corporation, XRT94L31IB-L Datasheet - Page 111

• Manufacturer Part Number: XRT94L31IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L31IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
N
Table 11
Ingress Direction) for DS3/E3 Applications, and when the DS3/E3 Framer block has been configured to sample
the DS3/E3/STS_1_DATA_IN and DS3/E3/STS_1_NEG_IN signals upon the rising edge of DS3/E3/
STS_1_CLOCK_IN.
Table 12
Ingress Direction) for DS3/E3 Applications, and when the DS3/E3 Framer block has been configured to sample
the DS3/E3/STS_1_DATA_IN and DS3/E3/STS_1_NEG_IN signals upon the falling edge of DS3/E3/
STS_1_CLOCK_IN.
F
E3/STS-1 LIU I
1.3.4
S
OTE
IGURE
S
T
YMBOL
ABLE
YMBOL
t10
t9
t10
t9
: The values for t9 and t10 are presented in
16. A
11: T
T
presents information on the Timing parameters for the DS3/E3/STS-1 LIU Interface Signals (in the
presents information on the Timing parameters for the DS3/E3/STS-1 LIU Interface Signals (in the
DS3/E3/STS_1_DATA_IN and DS3/E3/STS_1_NEG_IN to falling edge of
DS3/E3/STS_1_CLOCK_IN set-up time requirements
Falling edge of DS3/E3/STS_1_CLOCK_IN to DS3/E3/STS_1_DATA_IN and
DS3/E3/STS_1_NEG_IN Hold time requirements
ABLE
DS3/E3/STS_1_CLOCK_IN
Ingress Timing for DS3/E3 Applications
DS3/E3/STS_1_DATA_IN and DS3/E3/STS_1_NEG_IN to rising edge of
DS3/E3/STS_1_CLOCK_IN set-up time requirements
Rising edge of DS3/E3/STS_1_CLOCK_IN to DS3/E3/STS_1_DATA_IN
and DS3/E3/STS_1_NEG_IN Hold time requirements
DS3/E3/STS_1_DATA_IN
DS3/E3/STS_1_NEG_IN
IMING
N
NTERFACE
12: T
I
LLUSTRATION OF THE
I
NFORMATION FOR THE
IMING
A
(
PPLICATIONS
IN THE
I
NFORMATION FOR THE
(
RISING EDGE OF
I
NGRESS
W
(
D
FALLING EDGE OF
AVEFORMS OF THE
D
ESCRIPTION
ESCRIPTION
I
D
NGRESS
IRECTION
Tables 11
DS3/E3/STS_1_CLOCK_IN)
I
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
NGRESS
DS3/E3/STS-1 LIU I
)
111
t9
,
DS3/E3/STS_1_CLOCK_IN)
12
DS3/E3/STS-1
DS3/E3/STS-1 LIU I
,
13
and
14
t10
NTERFACE FOR
.
SIGNALS THAT ARE INPUT TO THE
NTERFACE FOR
M
4ns
0ns
M
4ns
0ns
IN
IN
.
DS3/E3 A
.
T
DS3/E3
T
YP
YP
XRT94L31
.
PPLICATIONS
.
M
M
AX
AX
DS3/
.
.