XRT94L31IB-L Exar Corporation, XRT94L31IB-L Datasheet - Page 83

• Manufacturer Part Number: XRT94L31IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L31IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
AB8
AD7
AE5
AD8
SIGNAL NAME
RxTOHFrame
RxE1F1E2FP
RxLDCCVAL
RxLDCC
I/O
O
O
O
O
CMOS
CMOS
CMOS
CMOS
TYPE
Receive TOH Output Port - STS-3/STM-1 Frame Indicator:
This output pin, along with the RxTOHClk, RxTOHValid and RxTOH out-
put pins function as the Receive TOH Output port.
This output pin will pulse "High", for one period of RxTOHClk, one RxTO-
HClk period prior to the very first TOH bit (of a given STS-3 frame) being
output via the RxTOH output pin.
Receive - Line DCC Output Port - DCC Value Indicator Output pin:
This output pin, along with the RxTOHClk and the RxLDCC output pins
function as the Receive Line DCC output port of the XRT94L31.
This output pin pulses "High" coincident to when the Receive Line DCC
output port outputs a DCC bit via the RxLDCC output pin.
This output pin is updated upon the falling edge of RxTOHClk.
The Line DCC HDLC Controller circuitry that is interfaced to this output
pin, the RxLDCC and the RxTOHClk pins is suppose to do the following.
It should continuously sample and monitor the state of this output pin
upon the rising edge of RxTOHClk.
Anytime the Line DCC HDLC circuitry samples this output pin being
"High", it should sample and latch the data on the RxLDCC output pin
(as a valid Line DCC bit) into the Line DCC HDLC circuitry.
Receive - Line DCC Output Port - Output Pin:
This output pin, along with RxLDCCVAL and the RxTOHClk output pins
function as the Receive Line DCC output port of the XRT94L31.
This pin outputs the contents of the Line DCC (e.g., the D4, D5, D6, D7,
D8, D9, D10, D11 and D12 bytes), within the incoming STS-3 data-
stream.
The Receive Line DCC Output port will assert the RxLDCCVAL output
pin, in order to indicate that the data, residing on the RxLDCC output pin
is a valid Line DCC byte. The Receive Line DCC output port will update
the RxLDCCVAL and the RxLDCC output pins upon the falling edge of
the RxTOHClk output pin.
The Line DCC HDLC circuitry that is interfaced to this output pin, the
RxLDCCVAL and the RxTOHClk pins is suppose to do the following.
It should continuously sample and monitor the state of the RxLDCCVAL
output pin upon the rising edge of RxTOHClk.
Anytime the Line DCC HDLC circuitry samples the RxLDCCVAL output
pin "High", it should sample and latch the contents of this output pin (as
a valid Line DCC bit) into the Line DCC HDLC circuitry.
Receive - Order-Wire Output Port - Frame Boundary Indicator:
This output pin, along with RxE1F1E2, RxE1F1E2Val and the RxTOHClk
output pins function as the Receive Order-Wire Output port of the
XRT94L31.
This output pin pulses "High" (for one period of RxTOHClk) coincident to
when the very first bit (of the E1 byte) is being output vi the RxE1F1E2
output pin.
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
83
DESCRIPTION
XRT94L31