XRT94L31IB-L Exar Corporation, XRT94L31IB-L Datasheet - Page 17

• Manufacturer Part Number: XRT94L31IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L31IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
G4
E2
H3
SIGNAL NAME
TXA_ALARM
TXA_DP
TxSBFP
I/O
O
O
I
CMOS
CMOS
TTL
TYPE
Transmit STS-3/STM-1 Telecom Bus - Alarm Indicator Output sig-
nal:
This output pin pulses "High", coincdent to the instant that the Transmit
STS-3/STM-1 Telecom Bus outputs a byte (via the TxA_D[7:0] output
pins) that pertains to any that STS-1 or STS-3c signal is carrying the
AIS-P indicator.
This output pin is "Low" for all other conditions.
N
Transmit STS-3/STM-1 Telecom Bus - Parity Output pin:
This output pin can be configured to function as one of the following.To
reflect either the EVEN or ODD parity value of the bits which are cur-
rently being output via the TXA_D[7:0] output pins.
To reflect either the EVEN or ODD parity value of the bits which are cur-
rently being output via the TXA_D[7:0] output pins and the states of the
TXA_PL and TXA_C1J1 output pins.
N
Transmit STS-3/STM-1 Frame Alignment Sync Input:
The Transmit STS-3 TOH Processor Block can be configured to initiate
its generation of a new outbound STS-3/STM-1 frame based upon an
externally supplied 8kHz clock signal to this input pin. If this feature is
used, the Transmit STS-3/STM-1 Telecom Bus Interface will begin trans-
mitting the very first byte of given STS-3 or STM-1 frame, upon sensing
a rising edge (of the 8kHz signal) at this input pin.
N
OTE
OTE
OTES
1. If this input pin is connected to GND, then the Transmit STS-3
2. This input signal must be synchronized with the signal that is
3. The user must supply an 8kHz pulse (to this input pin) that has
4. Register HRSYNC_DLY (Address Location: 0x0135) defines
:
: Any one of these configuration selections can be made by writing
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
:
Telecom Bus Interface is enabled and has been configured to
operate in the Re-Phase OFF Mode.
the appropriate value into the Telecom Bus Control Register
(Address Location = 0x0137).
This output pin is only active if the Transmit STS-3/STM-1
TOH Processor block will generate its outbound STS-3/STM-1
frames asynchronously, with respect to any input signal.
supplied to the REFTTL input pin. Failure to insure this will
result in bit errors being generated within the outbound STS-3/
STM-1 signal.
a width of approximately 51.4412.8ns (one 19.44MHz clock
period). The user must not apply a 50% duty cycle 8kHz signal
to this input pin.
the timing for TxSBFP input pin.
17
DESCRIPTION
XRT94L31