XRT94L31IB-L Exar Corporation, XRT94L31IB-L Datasheet - Page 85

• Manufacturer Part Number: XRT94L31IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L31IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
AD6
AE6
AF4
SIGNAL NAME
RxE1F1E2VAL
RxSDCCVAL
RXPOH
I/O
O
O
O
CMOS
CMOS
CMOS
TYPE
Receive - Section DCC Output Port - DCC Value Indicator Output
pin:
This output pin, along with the RxTOHClk and the RxSDCC output pins
function as the Receive Section DCC output port of the XRT94L31.
This output pin pulses "High" coincident to when the Receive Section
DCC output port outputs a DCC bit via the RxSDCC output pin.
This output pin is updated upon the falling edge of RxTOHClk.
The Section DCC HDLC Controller circuitry that is interfaced to this out-
put pin, the RxSDCC and the RxTOHClk pins is suppose to do the fol-
lowing.
It should continuously sample and monitor the state of this output pin
upon the rising edge of RxTOHClk.
Anytime the Section DCC HDLC circuitry samples this output pin being
"High", it should sample and latch the data on the RxSDCC output pin
(as a valid Section DCC bit) into the Section DCC HDLC circuitry.
Receive - Order Wire Output Port - E1F1E2 Value Indicator Output
Pin:
This output pin, along with the RxTOHClk, RxE1F1E2FP, RxE1F1E2
and RxTOHClk output pins function as the Receive - Order Wire Output
Port of the XRT94L31.
This output pin pulses "High" coincident to when the Receive - Order
Wire output port outputs the contents of an E1, F1 or E2 byte, via the
RxE1F1E2 output pin.
This output pin is updated upon the falling edge of RxTOHClk.The
Receive Order-Wire circuitry, that is interfaced to this output pin, the
RxE1F1E2 and the RxTOHClk pins is suppose to do the following.
It should continuously sample and monitor the state of this output pin
upon the rising edge of RxTOHClk.
Anytime the Receive Order-Wire circuitry samples this output pin being
"High", it should sample and latch the data on the RxE1F1E2 output pin
(as a valid Order-wire bit) into the Receive Order-Wire circuitry.
Receive AU-4/VC-4/STS-3c Mapper POH Processor Block - Path
Overhead Output Port - Output Pin:
This output pin, along with the RxPOHClk, RxPOHFrame and RxPOH-
Valid function as the AU-4/VC-4 Mapper POH Processor block - POH
Output port.
These pins serially output the POH data that have been received by the
Receive AU-4/VC-4 Mapper POH Processor block (via the incoming
STS-3 data-stream). Each bit, within the POH bytes is updated (via
these output pins) upon the falling edge of RxPOHClk. As a conse-
quence, external circuitry receiving this data, should sample this data
upon the rising edge of RxPOHClk.
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
85
DESCRIPTION
XRT94L31