ATMEGA32M1-AUR Atmel, ATMEGA32M1-AUR Datasheet - Page 103
![IC MPU AVR 32K 20MHZ 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA32M1-AUR
Manufacturer Part Number
ATMEGA32M1-AUR
Description
IC MPU AVR 32K 20MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32M1-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
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15.2.1
8209D–AVR–11/10
Registers
Figure 15-1. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNTn), Output Compare Registers (OCRnx), and Input Capture Register
(ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16-bit
registers. These procedures are described in the section
104. The Timer/Counter Control Registers (TCCRnx) are 8-bit registers and have no CPU
access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all visible
in the Timer Interrupt Flag Register (TIFRn). All interrupts are individually masked with the Timer
Interrupt Mask Register (TIMSKn). TIFRn and TIMSKn are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the Tn pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
The double buffered Output Compare Registers (OCRnx) are compared with the Timer/Counter
value at all time. The result of the compare can be used by the Waveform Generator to generate
a PWM or variable frequency output on the Output Compare pin (OCnx).
Units” on page 111.
which can be used to generate an Output Compare interrupt request.
1. Refer to
Timer/Counter
Table 1-1 on page 3
TCCRnA
OCRnA
OCRnB
TCNTn
The compare match event will also set the Compare Match Flag (OCFnx)
ICRn
=
=
Direction
Count
Clear
RTG
for Timer/Counter1 pin placement and description
Control Logic
TOP
=
TCCRnB
ATmega16M1/32M1/64M1
Values
BOTTOM
Fixed
TOP
Detector
ICFn (Int.Req.)
Edge
(1)
clk
=
Tn
0
“Accessing 16-bit Registers” on page
Canceler
Noise
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
( From Prescaler )
Waveform
Waveform
Detector
AC1ICE
Edge
Analog Comparator 1
Interrupt
See “Output Compare
ICPSEL1
0
1
T
ICPnA
n
ICPnB
OCnA
OCnB
).
Tn
103
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