ATMEGA32M1-AUR Atmel, ATMEGA32M1-AUR Datasheet - Page 83
![IC MPU AVR 32K 20MHZ 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA32M1-AUR
Manufacturer Part Number
ATMEGA32M1-AUR
Description
IC MPU AVR 32K 20MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32M1-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
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13.4
13.4.1
13.4.2
13.4.3
13.4.4
13.4.5
13.4.6
13.4.7
8209D–AVR–11/10
Register Description
MCUCR – MCU Control Register
PORTB – Port B Data Register
DDRB – Port B Data Direction Register
PINB – Port B Input Pins Address
PORTC – Port C Data Register
DDRC – Port C Data Direction Register
PINC – Port C Input Pins Address
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 65
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
PORTB7
PORTC7
SPIPS
PINB7
PINC7
DDB7
DDC7
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
0
7
7
0
7
0
7
7
0
7
0
7
PORTB6
PORTC6
PINB6
PINC6
DDB6
DDC6
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
6
–
0
6
0
6
0
6
6
0
6
0
6
for more details on this feature.
PORTB5
PORTC5
PINB5
PINC5
DDB5
DDC5
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
5
0
5
0
5
5
0
5
0
5
R
5
–
0
PORTB4
PORTC4
PINB4
PINC4
DDB4
DDC4
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
4
0
4
0
4
4
0
4
0
4
PUD
R/W
4
0
ATmega16M1/32M1/64M1
PORTB3
PORTC3
PINB3
PINC3
DDB3
DDC3
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
3
0
3
0
3
3
0
3
0
3
R
3
–
0
PORTB2
PORTC2
PINB2
PINC2
DDB2
DDC2
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
2
0
2
0
2
2
0
2
0
2
R
2
–
0
PORTB1
PORTC1
PINB1
PINC1
DDB1
DDC1
IVSEL
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R/W
1
0
1
0
1
1
0
1
0
1
1
0
PORTB0
PORTC0
PINB0
PINC0
DDB0
DDC0
IVCE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
0
0
0
0
0
0
0
0
0
0
0
0
MCUCR
PORTB
PORTC
DDRB
DDRC
PINB
PINC
“Con-
83
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