ATMEGA32M1-AUR Atmel, ATMEGA32M1-AUR Datasheet - Page 288
![IC MPU AVR 32K 20MHZ 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA32M1-AUR
Manufacturer Part Number
ATMEGA32M1-AUR
Description
IC MPU AVR 32K 20MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32M1-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
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27.2
288
Fuse Bits
ATmega16M1/32M1/64M1
Table 27-3.
Notes:
The ATmega16M1/32M1/64M1 has three Fuse bytes.
describe briefly the functionality of all the fuses and how they are mapped into the Fuse bytes.
Note that the fuses are read as logical zero, “0”, if they are programmed.
Table 27-4.
Extended Fuse Byte
-
-
PSCRB
PSCRVA
PSCRVB
BLB0 Mode
BLB1 Mode
1
2
3
4
1
2
3
4
1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2
2. “1” means unprogrammed, “0” means programmed
Lock Bit Protection Modes
Extended Fuse Byte
BLB02
BLB12
1
1
0
0
1
1
0
0
BLB01
BLB11
Bit No
7
6
5
4
3
1
0
0
1
1
0
0
1
No restrictions for SPM or LPM accessing the Application
section
SPM is not allowed to write to the Application section
SPM is not allowed to write to the Application section, and LPM
executing from the Boot Loader section is not allowed to read
from the Application section. If Interrupt Vectors are placed in
the Boot Loader section, interrupts are disabled while executing
from the Application section
LPM executing from the Boot Loader section is not allowed to
read from the Application section. If Interrupt Vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section
No restrictions for SPM or LPM accessing the Boot Loader
section
SPM is not allowed to write to the Boot Loader section
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read
from the Boot Loader section. If Interrupt Vectors are placed in
the Application section, interrupts are disabled while executing
from the Boot Loader section
LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section
Description
-
-
PSC Reset Behaviour
PSCOUTnA Reset Value
PSCOUTnB Reset Value
(1)(2)
Table 27-4
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
to
Table 27-7 on page 290
8209D–AVR–11/10
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