EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 246

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

17.3.1 Counter Modes
17.3.1.1 Events
17.3.1.2 Operation
2010-12-21 - d0034_Rev0.90
Figure 17.1. TIMER Block Overview
The Timer consists of a counter that can be configured to the following modes:
1. Up-count: Counter counts up until it reaches the value in TIMERn_TOP, where it is reset to 0 before
2. Down-count: The counter starts at the value in TIMERn_TOP and counts down. When it reaches 0,
3. Up/Down-count: The counter starts at 0 and counts up. When it reaches the value in TIMERn_TOP,
4. Quadrature Decoder: Two input channels where one determines the count direction, while the other
In addition, to the TIMER modes listed above, the TIMER also supports a 2x Count Mode. In this mode
the counter increments/decrements by 2. The 2x Count Mode intended use is to generate 2x PWM
frequency when the Compare/Capture channel is put in PWM mode. The 2x Count Mode can be enabled
by setting the X2CNT bitfield in the TIMERn_CTRL register.
The counter value can be read or written by software at any time by accessing the CNT field in
TIMERn_CNT.
Overflow is set when the counter value shifts from TIMERn_TOP to the next value when counting up. In
up-count mode the next value is 0. In up/down-count mode, the next value is TIMERn_TOP-1.
Underflow is set when the counter value shifts from 0 to the next value when counting down. In down-
count mode, the next value is TIMERn_TOP. In up/down-count mode the next value is 1.
Update event is set on overflow in up-count mode and on underflow in down-count or up/down count
mode. This event is used to time updates of buffered values.
Figure 17.2 (p. 247) shows the hardware Timer/Counter control. Software can start or stop the counter
by writing a 1 to the START or STOP bits in TIMERn_CMD. The counter value (CNT in TIMERn_CNT)
can always be written by software to any 16-bit value.
counting up again.
it is reloaded with the value in TIMERn_TOP.
it counts down until it reaches 0 and starts counting up again.
pin triggers a clock event.
TIMn_CC0
TIMn_CC1
TIMn_CC2
HFPERCLK
PRS inputs
PRS inputs
PRS inputs
TIMERn
Input logic
Input logic
Input logic
Quadrature
Decoder
Prescaler
detect
detect
detect
Edge
Edge
Edge
CNTCLK
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Input Capture
246
TnCCR0[ 15:0
TnCCR1[ 15:0
TIMERn_CNT
TIMERn_CCx
Counter
control
]
]
condition
Update
= =
=
TIMERn_TOP
= 0
=
Com pare and
Com pare and
Com pare and
PWM config
PWM config
PWM config
Note: For sim plicity, all
TIMERn_CCx registers are
grouped together in the figure,
but they all have individual Input
Capture Registers
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Overflow
Underflow
Com pare Match x
TIMn_CC1
TIMn_CC2
TIMn_CC0