EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 75

MCU 32BIT 32KB FLASH 32-QFN

EFM32TG210F32

Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Datasheets

Specifications of EFM32TG210F32

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
8.7.18 DMA_IF - Interrupt Flag Register
8.7.19 DMA_IFS - Interrupt Flag Set Register
31
30:8
7
6
5
4
3
2
1
0
Offset
0x1000
Reset
Access
Name
Bit
Offset
0x1004
Reset
Access
Name
2010-12-21 - d0034_Rev0.90
ERR
This flag is set when an error has occurred on the AHB bus.
Reserved
CH7DONE
Set when the DMA channel has compeleted its transfer. If the channel is disabled, the flag is set when there is a request for the
channel.
CH6DONE
Set when the DMA channel has compeleted its transfer. If the channel is disabled, the flag is set when there is a request for the
channel.
CH5DONE
Set when the DMA channel has compeleted its transfer. If the channel is disabled, the flag is set when there is a request for the
channel.
CH4DONE
Set when the DMA channel has compeleted its transfer. If the channel is disabled, the flag is set when there is a request for the
channel.
CH3DONE
Set when the DMA channel has compeleted its transfer. If the channel is disabled, the flag is set when there is a request for the
channel.
CH2DONE
Set when the DMA channel has compeleted its transfer. If the channel is disabled, the flag is set when there is a request for the
channel.
CH1DONE
Set when the DMA channel has compeleted its transfer. If the channel is disabled, the flag is set when there is a request for the
channel.
CH0DONE
Set when the DMA channel has compeleted its transfer. If the channel is disabled, the flag is set when there is a request for the
channel.
Name
0
0
0
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
R
R
R
R
R
R
R
R
R
Access
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Bit Position
Bit Position
75
DMA Error Interrupt Flag
DMA Channel 7 Complete Interrupt Flag
DMA Channel 6 Complete Interrupt Flag
DMA Channel 5 Complete Interrupt Flag
DMA Channel 4 Complete Interrupt Flag
DMA Channel 3 Complete Interrupt Flag
DMA Channel 3 Complete Interrupt Flag
DMA Channel 2 Complete Interrupt Flag
DMA Channel 1 Complete Interrupt Flag
Description
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