EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 72

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.7.13 DMA_CHALTS - Channel Alternate Set Register
8.7.14 DMA_CHALTC - Channel Alternate Clear Register
31:8
7
6
5
4
3
2
1
0
31:8
Bit
Offset
0x030
Reset
Access
Name
Bit
Offset
0x034
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
Write to 1 to disable this channel. Note that the controller disables a channel, by setting the appropriate bit, when either it completes
the DMA cycle, or it reads a channel_cfg memory location which has cycle_ctrl = b000, or an ERROR occurs on the AHB-Lite bus.
Reserved
CH7ALTS
Write to 1 to select the alternate structure for this channel.
CH6ALTS
Write to 1 to select the alternate structure for this channel.
CH5ALTS
Write to 1 to select the alternate structure for this channel.
CH4ALTS
Write to 1 to select the alternate structure for this channel.
CH3ALTS
Write to 1 to select the alternate structure for this channel.
CH2ALTS
Write to 1 to select the alternate structure for this channel.
CH1ALTS
Write to 1 to select the alternate structure for this channel.
CH0ALTS
Write to 1 to select the alternate structure for this channel.
Reserved
Name
Name
Name
0
0
0
0
0
0
0
0
Reset
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW1
RW1
RW1
RW1
RW1
RW1
RW1
RW1
Access
Access
Access
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Bit Position
Bit Position
72
Channel 7 Alternate Structure Set
Channel 6 Alternate Structure Set
Channel 5 Alternate Structure Set
Channel 4 Alternate Structure Set
Channel 3 Alternate Structure Set
Channel 2 Alternate Structure Set
Channel 1 Alternate Structure Set
Channel 0 Alternate Structure Set
Description
Description
Description
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