AT25DF081A-MH-T Atmel, AT25DF081A-MH-T Datasheet - Page 37

• Manufacturer Part Number: AT25DF081A-MH-T
• Description: IC FLASH 8MBIT SPI 8UDFN
• Manufacturer: Atmel

Specifications of AT25DF081A-MH-T

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 8M (4096 pages x 256 bytes)
• Speed: 100MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-UDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8715B–SFLSH–8/10
12.
12.1
Other Commands and Functions
Reset
In some applications, it may be necessary to prematurely terminate a program or erase cycle early rather than wait
the hundreds of microseconds or milliseconds necessary for the program or erase operation to complete normally.
The Reset command allows a program or erase operation in progress to be ended abruptly and returns the device
to an idle state. Since the need to reset the device is immediate, the Write Enable command does not need to be
issued prior to the Reset command being issued. Therefore, the Reset command operates independently of the
state of the WEL bit in the Status Register.
The Reset command can only be executed if the command has been enabled by setting the Reset Enabled
(RSTE) bit in the Status Register to a logical “1”. If the Reset command has not been enabled (the RSTE bit is in
the logical “0” state), then any attempts at executing the Reset command will be ignored.
To perform a Reset, the CS pin must first be asserted and the opcode of F0h must be clocked into the device. No
address bytes need to be clocked in, but a confirmation byte of D0h must be clocked into the device immediately
after the opcode. Any additional data clocked into the device after the confirmation byte will be ignored. When the
CS pin is deasserted, the program or erase operation currently in progress will be terminated within a time of t
Since the program or erase operation may not complete before the device is reset, the contents of the page being
programmed or the block being erased cannot be guaranteed to be valid.
The Reset command has no effect on the states of the Sector Protection Registers, the Sector Lockdown Regis-
ters, or the SPRL, RSTE, and SLE bits in the Status Register. The WEL, PS, and ES bits, however, will be reset
back to their default states.
The complete opcode and confirmation byte must be clocked into the device before the CS pin is deasserted, and
the CS pin must be deasserted on an even byte boundary (multiples of eight bits); otherwise, no Reset operation
will be performed.
Figure 12-1. Reset
SCK
SO
CS
SI
HIGH-IMPEDANCE
MSB
1
0
1
1
1
2
OPCODE
1
3
0
4
0
5
0
6
0
7
MSB
1
CONFIRMATION BYTE IN
8
1
9
0
10 11
1
0
12
0
13
0
14 15
0
Atmel AT25DF081A
RST
37
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