UPD78F0886GA(A)-GAM-AX NEC, UPD78F0886GA(A)-GAM-AX Datasheet - Page 113

8BIT MCU, 60K FLASH, 3KB RAM, CAN

UPD78F0886GA(A)-GAM-AX

Manufacturer Part Number
UPD78F0886GA(A)-GAM-AX
Description
8BIT MCU, 60K FLASH, 3KB RAM, CAN
Manufacturer
NEC
Datasheet

Specifications of UPD78F0886GA(A)-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm Channels
6
Digital Ic Case Style
LQFP
Core Size
8bit
Program Memory Size
60KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
[Instruction format]
[Operation]
[Operand]
[Flag]
[Description]
[Description example]
BF
• If the 1st operand (bit) contents have been cleared (0), data is branched to the address specified by the 2nd
BF P2.2, $1549H; When bit 2 of port 2 is 0, data is branched to address 1549H (with the start of this instruction
operand ($addr16).
If the 1st operand (bit) contents have not been cleared (0), no processing is carried out and the subsequent
instruction is executed.
Mnemonic
Z
BF
AC
saddr.bit, $addr16
sfr.bit, $addr16
A.bit, $addr16
PSW.bit, $addr16
[HL].bit, $addr16
set in the range of addresses 14C6H to 15C5H).
Operand(bit,$addr16)
PC ← PC+b+jdisp8 if bit = 0
BF bit, $addr16
CY
CHAPTER 5 EXPLANATION OF INSTRUCTIONS
User's Manual U12326EJ4V0UM
b(Number of bytes)
Conditional Branch by Bit Test (Byte Data Bit = 0)
4
4
3
4
3
Branch if False
113

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