UPD78F0886GA(A)-GAM-AX NEC, UPD78F0886GA(A)-GAM-AX Datasheet - Page 24

8BIT MCU, 60K FLASH, 3KB RAM, CAN

UPD78F0886GA(A)-GAM-AX

Manufacturer Part Number
UPD78F0886GA(A)-GAM-AX
Description
8BIT MCU, 60K FLASH, 3KB RAM, CAN
Manufacturer
NEC
Datasheet

Specifications of UPD78F0886GA(A)-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm Channels
6
Digital Ic Case Style
LQFP
Core Size
8bit
Program Memory Size
60KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
24
3.2 Operand Address Addressing
during instruction execution.
3.2.1 Implied addressing
The following methods are available to specify the register and memory (addressing) to undergo manipulation
[Function]
[Operand format]
[Description example]
This addressing automatically specifies the address of the registers that function as an accumulator (A and
AX) in the general-purpose register area.
Of the 78K/0 Series instruction words, the following instructions employ implied addressing.
Because implied addressing can be automatically employed with an instruction, no particular operand format
is necessary.
In the case of MULU X
With an 8-bit x 8-bit multiply instruction, the product of the A register and X register is stored in AX. In this
example, the A and AX registers are specified by implied addressing.
MULU
DIVUW
ADJBA/ADJBS
ROR4/ROL4
Instruction
A register for multiplicand and AX register for product storage
AX register for dividend and quotient storage
A register for storage of numeric values targeted for decimal correction
A register for storage of digit data that undergoes digit rotation
User's Manual U12326EJ4V0UM
CHAPTER 3 ADDRESSING
Register to Be Specified by Implied Addressing

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