UPD78F0886GA(A)-GAM-AX NEC, UPD78F0886GA(A)-GAM-AX Datasheet - Page 57

8BIT MCU, 60K FLASH, 3KB RAM, CAN

UPD78F0886GA(A)-GAM-AX

Manufacturer Part Number
UPD78F0886GA(A)-GAM-AX
Description
8BIT MCU, 60K FLASH, 3KB RAM, CAN
Manufacturer
NEC
Datasheet

Specifications of UPD78F0886GA(A)-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm Channels
6
Digital Ic Case Style
LQFP
Core Size
8bit
Program Memory Size
60KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
[Instruction format]
[Operation]
[Operand]
[Flag]
[Description]
[Description example]
SUB
• The source operand (src) specified by the 2nd operand is subtracted from the destination operand (dst)
• If the subtraction shows that dst is 0, the Z flag is set (1). In all other cases, the Z flag is cleared (0).
• If the subtraction generates a borrow out of bit 7, the CY flag is set (1). In all other cases, the CY flag is
• If the subtraction generates a borrow for bit 3 out of bit 4, the AC flag is set (1). In all other cases, the AC
SUB D, A;
Note Except r = A
specified by the 1st operand and the result is stored in the destination operand (dst) and the CY flag.
The destination operand can be cleared to 0 by equalizing the source operand (src) and the destination
operand (dst).
cleared (0).
flag is cleared (0).
Mnemonic
Z
×
SUB
The A register is subtracted from the D register and the result is stored in the D register.
AC
×
A, #byte
saddr, #byte
A, r
r, A
A, saddr
dst, CY ← dst – src
SUB dst, src
CY
×
Operand(dst,src)
CHAPTER 5 EXPLANATION OF INSTRUCTIONS
User's Manual U12326EJ4V0UM
Note
Mnemonic
SUB
A, !addr16
A, [HL]
A, [HL+byte]
A, [HL+B]
A, [HL+C]
Operand(dst,src)
Byte Data Subtraction
Subtract
57

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