UPD78F0886GA(A)-GAM-AX NEC, UPD78F0886GA(A)-GAM-AX Datasheet - Page 89

8BIT MCU, 60K FLASH, 3KB RAM, CAN

UPD78F0886GA(A)-GAM-AX

Manufacturer Part Number
UPD78F0886GA(A)-GAM-AX
Description
8BIT MCU, 60K FLASH, 3KB RAM, CAN
Manufacturer
NEC
Datasheet

Specifications of UPD78F0886GA(A)-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm Channels
6
Digital Ic Case Style
LQFP
Core Size
8bit
Program Memory Size
60KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
[Instruction format]
[Operation]
[Operand]
[Flag]
[Description]
[Description example]
XOR1
• The exclusive logical sum of bit data of the destination operand (dst) specified by the 1st operand and the
• The operation result is stored in the CY flag (because of the destination operand (dst)).
XOR1 CY, A.7; The exclusive logical sum of the A register bit 7 and the CY flag is obtained and the result
source operand (src) specified by the 2nd operand is obtained and the result is stored in the destination
operand (dst).
Mnemonic
Z
XOR1
AC
is stored in the CY flag.
CY, saddr.bit
CY, sfr.bit
CY, A.bit
CY, PSW.bit
CY, [HL].bit
dst ← dst ∨ src
XOR1 dst, src
CY
×
Operand(dst,src)
CHAPTER 5 EXPLANATION OF INSTRUCTIONS
User's Manual U12326EJ4V0UM
1 Bit Data Exclusive Logical Sum
Exclusive Or Single Bit
89

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