AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 113
AU80610004392AAS LBLA
Manufacturer Part Number
AU80610004392AAS LBLA
Description
MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
Manufacturer
Intel
Series
ATOM - D500r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004392AAS LBLA
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.9.13
1.9.14
Datasheet
GTTADR - Graphics Translation Table Range Address
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register requests allocation for Graphics Translation Table Range. The allocation
is for 1 MB and the base address is defined by bits [31:20].
SVID2 - Subsystem Vendor Identification
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
31:20
19:4
15:0
2:1
Bit
Bit
3
0
Access
Access
RWO
RW
RO
RO
RO
RO
Default Value
Default Value
0000h
0000h
000h
00b
0b
0b
0/2/0/PCI
1C-1Fh
00000000h
32 bits
0/2/0/PCI
2C-2Dh
0000h
16 bits
RO; RW;
RWO;
Memory Base Address (MBA):
signals [31:20].
Address Mask (ADMSK):
Prefetchable Memory (PREFMEM):
Memory Type (MEMTYP):
Hardwired to 0s to indicate 32-bit address.
Memory/IO Space (MIOS):
Hardwired to 0 to indicate memory space.
Subsystem Vendor ID (SUBVID):
subsystem. This register should be programmed by
BIOS during boot-up. Once written, this register
becomes Read_Only. This register can only be
cleared by a Reset.
Hardwired to 0s to indicate a 1 MB address range.
Set by the OS, these bits correspond to address
Hardwired to 0 to prevent prefetching.
This value is used to identify the vendor of the
Description
Description
113
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