AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 3

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Contents
1
Datasheet
Processor Configuration Registers ........................................................................ 8
1.1
1.2
1.3
1.4
1.5
Register Terminology .............................................................................. 8
System Address Map ............................................................................ 10
Processor Register Introduction .............................................................. 26
I/O Mapped Registers ........................................................................... 27
PCI Device 0 ........................................................................................ 28
1.2.1
1.2.2
1.2.3
1.2.4
1.2.5
1.2.6
1.2.7
1.2.8
1.2.9
1.2.10
1.5.1
1.5.2
1.5.3
1.5.4
1.5.5
1.5.6
1.5.7
1.5.8
1.5.9
1.5.10
1.5.11
1.5.12
1.5.13
1.5.14
1.5.15
1.5.16
1.5.17
1.5.18
1.5.19
1.5.20
1.5.21
1.5.22
1.5.23
1.5.24
1.5.25
1.5.26
1.5.27
1.5.28
1.5.29
1.5.30
1.5.31
1.5.32
Legacy Address Range ............................................................. 12
Main Memory Address Range (1 MB - TOLUD) ............................. 15
PCI* Memory Address Range (TOLUD - 4 GB) .............................. 18
Main Memory Address Space (4 GB to TOUUD) ............................ 20
PCI Express Configuration Address Space ................................... 21
Graphics Memory Address Ranges ............................................. 22
System Management Mode (SMM) ............................................. 22
Memory Shadowing ................................................................. 25
I/O Address Space................................................................... 25
Memory Controller Decode Rules and Cross-Bridge Address Mapping26
VID - Vendor Identification ....................................................... 30
DID - Device Identification ........................................................ 31
PCICMD - PCI Command .......................................................... 31
PCISTS - PCI Status ................................................................ 33
RID - Revision Identification ..................................................... 35
CC - Class Code ...................................................................... 35
MLT - Master Latency Timer ...................................................... 36
HDR - Header Type .................................................................. 36
SVID - Subsystem Vendor Identification ..................................... 36
SID - Subsystem Identification .................................................. 37
CAPPTR - Capabilities Pointer .................................................... 37
PXPEPBAR - PCI Express Egress Port Base Address ....................... 37
MCHBAR - GMCH Memory Mapped Register Range Base ................ 38
GGC - GMCH Graphics Control Register ...................................... 39
DEVEN - Device Enable ............................................................ 41
PCIEXBAR - PCI Express Register Range Base Address .................. 42
DMIBAR - Root Complex Register Range Base Address .................. 44
PAM0 - Programmable Attribute Map 0 ....................................... 44
PAM1 - Programmable Attribute Map 1 ....................................... 46
PAM2 - Programmable Attribute Map 2 ....................................... 47
PAM3 - Programmable Attribute Map 3 ....................................... 48
PAM4 - Programmable Attribute Map 4 ....................................... 49
PAM5 - Programmable Attribute Map 5 ....................................... 50
PAM6 - Programmable Attribute Map 6 ....................................... 51
LAC - Legacy Access Control ..................................................... 52
REMAPBASE - Remap Base Address Register ............................... 52
REMAPLIMIT - Remap Limit Address Register .............................. 53
SMRAM - System Management RAM Control ................................ 53
ESMRAMC - Extended System Management RAM Control ............... 55
TOM - Top of Memory .............................................................. 56
TOUUD - Top of Upper Usable Dram ........................................... 57
GBSM - Graphics Base of Stolen Memory .................................... 57
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