AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 52

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AU80610004392AAS LBLA

Manufacturer Part Number
AU80610004392AAS LBLA
Description
MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
Manufacturer
Intel
Series
ATOM - D500r
Datasheet

Specifications of AU80610004392AAS LBLA

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.5.25
1.5.26
52
LAC - Legacy Access Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This 8-bit register controls a fixed DRAM hole from 15-16 MB.
REMAPBASE - Remap Base Address Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
15:10
6:0
9:0
Bit
Bit
7
Access
Access
RW/L
RW/L
RO
RO
000000b
Default
Default
Value
Value
3FFh
00h
0b
RST/
RST/
PWR
PWR
Core
Core
Core
Core
0/0/0/PCI
97h
00h
8 bits
0/0/0/PCI
98-99h
03FFh
16 bits
RW/L; RO;
RO; RW/L;
When the value in this register is greater than
the value programmed into the Remap Limit
register, the Remap window is disabled.
Hole Enable (HEN):
space. The DRAM that lies "behind" this space is
not remapped.
0: No memory hole.
1: Memory hole from 15 MB to 16 MB.
Reserved ():
Reserved ()
Remap Base Address [35:26]
(REMAPBASE):
boundary of the Remap window. The Remap
window is inclusive of this address. In the
decoder A[25:0] of the Remap Base Address are
assumed to be 0's. Thus the bottom of the
defined memory range will be aligned to a 64MB
boundary.
This field enables a memory hole in DRAM
The value in this register defines the lower
Processor Configuration Registers
Description
Description
Datasheet

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