AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 38

• Manufacturer Part Number: AU80610004392AAS LBLA
• Description: MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D500r

Specifications of AU80610004392AAS LBLA

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.5.13
38
MCHBAR - GMCH Memory Mapped Register Range Base
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This is the base address for the CPU Uncore Memory Mapped Configuration space.
There is no physical memory within this 16KB window that can be addressed. The
16KB reserved by this register does not alias to any PCI 2.3 compliant memory
mapped space. On reset, the CPU Uncore MMIO Memory Mapped Configuration space
is disabled and must be enabled by writing a 1 to MCHBAREN [Dev 0, offset48h, bit 0]
The register space contains memory control, initialization, timing, and buffer strength
registers; clocking registers; and power and thermal management registers.
63:36
35:12
63:36
35:14
11:1
Bit
Bit
0
Access
Access
RW/L
RW/L
RW/L
RO
RO
RO
0000000h
0000000h
000000h
000000h
Default
Default
Value
Value
000h
0b
RST/
RST/
PWR
PWR
Core
Core
Core
Core
Core
Core
0/0/0/PCI
48-4Fh
0000000000000000h
64 bits
RW/L; RO;
Reserved (Reserved)
PCI Express Egress Port MMIO Base
Address (PXPEPBAR):
This field corresponds to bits 35 to 12 of the
base address PCI Express Egress Port MMIO
configuration space. BIOS will program this
register resulting in a base address for a 4KB
block of contiguous memory address space. This
register ensures that a naturally aligned 4 KB
space is allocated within the first 64 GB of
addressable memory space. System Software
uses this base address to program the CPU
Uncore MMIO register set.
Reserved ()
PXPEPBAR Enable (PXPEPBAREN):
0: PXPEPBAR is disabled and does not claim any
memory
1: PXPEPBAR memory mapped accesses are
claimed and decoded appropriately
Reserved (Reserved):
GMCH Memory Mapped Base Address
(MCHBAR):
base address GMCH Memory Mapped
configuration space. BIOS will program this
register resulting in a base address for a 16KB
block of contiguous memory address space.
This register ensures that a naturally aligned
16KB space is allocated. System Software
uses this base address to program the GMCH
Memory Mapped register set.
This field corresponds to bits 35 to 14 of the
Processor Configuration Registers
Description
Description
Datasheet