AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 69
AU80610004392AAS LBLA
Manufacturer Part Number
AU80610004392AAS LBLA
Description
MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
Manufacturer
Intel
Series
ATOM - D500r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004392AAS LBLA
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.6.3
1.6.4
Datasheet
C0DRB1 - Channel 0 DRAM Rank Boundary Address 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
See C0DRB0
C0DRB2 - Channel 0 DRAM Rank Boundary Address 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
See C0DRB0
15:10
15:10
9:0
9:0
Bit
Bit
Access
Access
RW/L
RW/L
RO
RO
000000b
000000b
Default
Default
Value
Value
000h
000h
RST/
RST/
PWR
PWR
Core
Core
Core
Core
0/0/0/MCHBAR
202-203h
0000h
16 bits
0/0/0/MCHBAR
204-205h
0000h
16 bits
RW/L; RO;
RW/L; RO;
R0 = Total rank0 memory size/64MB
Reserved ()
Channel 0 Dram Rank Boundary Address 1
(C0DRBA1):
This register defines the DRAM rank boundary
for rank1 of Channel 0 (64 MB granularity)
=(R1 + R0)
R1 = Total rank1 memory size/64MB
R2 = Total rank2 memory size/64MB
R3 = Total rank3 memory size/64MB
Reserved ()
Channel 0 DRAM Rank Boundary Address 2
(C0DRBA2):
This register defines the DRAM rank boundary
for rank2 of Channel 0 (64 MB granularity)
=(R2 + R1 + R0)
R0 = Total rank0 memory size/64MB
R1 = Total rank1 memory size/64MB
R2 = Total rank2 memory size/64MB
R3 = Total rank3 memory size/64MB
Description
Description
69
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