P89LPC9103FTK NXP Semiconductors, P89LPC9103FTK Datasheet - Page 13

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P89LPC9103FTK

Manufacturer Part Number
P89LPC9103FTK
Description
MCU 8BIT 80C51 1K FLASH, HVSON-10
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC9103FTK

Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
8
Program Memory Size
1KB
Ram Memory Size
128Byte
Cpu Speed
18MHz
Oscillator Type
Internal Only
No. Of Timers
4
No. Of Pwm
RoHS Compliant

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NXP Semiconductors
Table 5.
Table 6.
P89LPC9102_9103_9107_3
Product data sheet
Symbol
P1.5/RST
V
V
Symbol
P0.1 to P0.5,
P0.7
P0.1/KBI1/
AD10
P0.2/KBI2/
AD11
P0.3/CIN1B/
AD12
P0.4/CIN1A/
AD13/DAC1
P0.5/CMPREF/
CLKIN
P0.7/T1/
CLKOUT
SS
DD
P89LPC9103 pin description
P89LPC9107 pin description
Pin
2
3
7
Pin
5
1
14
12
11
8
Type
I
I
I
I
Type
I/O
I/O
I
I
I/O
I
I
I/O
I
I
I/O
I
I
O
I/O
I
I
I/O
I/O
I
Description
P1.5 — Port 1 bit 5 (input-only).
RST — External Reset input during Power-on or if selected via UCFG1. When
functioning as a reset input a LOW on this pin resets the microcontroller, causing I/O
ports and peripherals to take on their default states, and the processor begins
execution at address 0. When using an oscillator frequency above 12 MHz, the
reset input function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until V
When system power is removed V
operating voltage. When using an oscillator frequency above 12 MHz, in some
applications, an external brownout detect circuit may be required to hold the
device in reset when V
Ground: 0 V reference.
Power supply: This is the power supply voltage for normal operation as well as Idle
mode and Power-down mode.
Description
Port 0: Port 0 is an I/O port with a user-configurable output type. During reset Port 0
latches are configured in the input-only mode with the internal pull-up disabled. The
operation of Port 0 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to
configurations”
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt triggered inputs.
Port 0 also provides various special functions as described below:
P0.1 — Port 0 bit 1.
KBI1 — Keyboard input 1.
AD10 — ADC1 channel 0 analog input.
P0.2 — Port 0 bit 2.
KBI2 — Keyboard input 2.
AD11 — ADC1 channel 1 analog input.
P0.3 — Port 0 bit 3.
CIN1B — Comparator 1 positive input.
AD12 — ADC1 channel 2 analog input.
P0.4 — Port 0 bit 4.
CIN1A — Comparator 1 positive input.
AD13 — ADC1 channel 3 analog input.
DAC1 — Digital to analog converter output.
P0.5 — Port 0 bit 5.
CMPREF — Comparator reference (negative) input.
CLKIN — External clock input.
P0.7 — Port 0 bit 7.
T1 — Timer/counter 1 external count input or overflow/PWM output.
CLKOUT — Clock output.
…continued
Rev. 03 — 10 July 2007
8-bit microcontrollers with two-clock accelerated 80C51 core
and
Table 12 “Static characteristics”
DD
falls below the minimum specified operating voltage.
P89LPC9102/9103/9107
DD
will fall below the minimum specified
DD
has reached its specified level.
for details.
Section 8.12.1 “Port
© NXP B.V. 2007. All rights reserved.
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