P89LPC9103FTK NXP Semiconductors, P89LPC9103FTK Datasheet - Page 26

• Manufacturer Part Number: P89LPC9103FTK
• Description: MCU 8BIT 80C51 1K FLASH, HVSON-10
• Manufacturer: NXP Semiconductors

Specifications of P89LPC9103FTK

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 8
• Program Memory Size: 1KB
• Ram Memory Size: 128Byte
• Cpu Speed: 18MHz
• Oscillator Type: Internal Only
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant

Table 9.
* indicates SFRs that are bit addressable.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
Name
TCON*
TH0
TH1
TL0
TL1
TMOD
TRIM
WDCON
WDL
WFEED1
WFEED2
Unimplemented bits in SFRs (labeled ’-’) are X (unknown) at all times. Unless otherwise specified, ones should not be written to these bits since they may be used for other
purposes in future derivatives. The reset values shown for these bits are logic 0s although they are unknown when read.
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
All ports are in input-only (high-impedance) state after power-up.
The RSTSRC register reflects the cause of the P89LPC9102/9103/9107 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset
value is xx11 0000.
The only reset source that affects these SFRs is power-on reset.
On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1s, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog timer reset and is logic 0 after power-on
reset. Other resets will not affect WDTOF.
P89LPC9107 special function registers
Description
Timer 0 and 1 control
Timer 0 high
Timer 1 high
Timer 0 low
Timer 1 low
Timer 0 and 1 mode
Internal oscillator trim register
Watchdog control register
Watchdog load
Watchdog feed 1
Watchdog feed 2
Bit address
SFR
addr.
8CH
8DH
C1H
C2H
C3H
88H
8AH
8BH
89H
96H
A7H
Bit functions and addresses
RCCLK
PRE2
…continued
MSB
TF1
8F
-
ENCLK
PRE1
TR1
8E
-
TRIM.5
T1M1
PRE0
TF0
8D
TRIM.4
T1M0
TR0
8C
-
TRIM.3
8B
-
-
-
WDRUN
TRIM.2
8A
-
-
WDTOF
TRIM.1
T0M1
89
-
WDCLK
TRIM.0
T0M0
LSB
88
-
Reset value
Hex
00
00
00
00
00
00
[5][6]
[5][7]
FF
Binary
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
1111 1111