P89LPC9103FTK NXP Semiconductors, P89LPC9103FTK Datasheet - Page 36

• Manufacturer Part Number: P89LPC9103FTK
• Description: MCU 8BIT 80C51 1K FLASH, HVSON-10
• Manufacturer: NXP Semiconductors

Specifications of P89LPC9103FTK

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 8
• Program Memory Size: 1KB
• Ram Memory Size: 128Byte
• Cpu Speed: 18MHz
• Oscillator Type: Internal Only
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant

NXP Semiconductors
P89LPC9102_9103_9107_3
Product data sheet
8.16.6 Timer overflow toggle output (P89LPC9102/9107)
8.18.1 Mode 0
8.18.2 Mode 1
8.18.3 Mode 2
8.17 RTC/system timer
8.18 UART (P89LPC9103/9107)
Timers 0 and 1 can be configured to automatically toggle a port output whenever a timer
overflow occurs. The same device pins that are used for the T0 and T1 count inputs are
also used for the timer toggle outputs. The port outputs will be a logic 1 prior to the first
timer overflow when this mode is turned on.
The P89LPC9102/9103/9107 has a simple RTC that allows a user to continue running an
accurate timer while the rest of the device is powered-down. The RTC can be a wake-up
or an interrupt source. The RTC is a 23-bit down counter comprised of a 7-bit prescaler
and a 16-bit loadable down counter. When it reaches all logic 0s, the counter will be
reloaded again and the RTCF flag will be set. The clock source for this counter is the
CCLK. Only power-on reset will reset the RTC and its associated SFRs to the default
state.
The P89LPC9103/9107 has an enhanced UART that is compatible with the conventional
80C51 UART except that Timer 2 overflow cannot be used as a baud rate source. The
P89LPC9103/9107 does include an independent Baud Rate Generator. The baud rate
can be selected from CCLK (divided by a constant), Timer 1 overflow, or the independent
Baud Rate Generator. In addition to the baud rate generation, enhancements over the
standard 80C51 UART include Framing Error detection, automatic address recognition,
selectable double buffering and several interrupt options. The UART can be operated in
four modes: shift register, 8-bit UART, 9-bit UART, and
Serial data enters and exits through RXD. TXD outputs the shift clock. Eight bits are
transmitted or received, LSB first. The baud rate is fixed at
frequency.
10 bits are transmitted (through TXD) or received (through RXD): a start bit (logic 0),
8 data bits (LSB first), and a stop bit (logic 1). When data is received, the stop bit is stored
in RB8 in Special Function Register SCON. The baud rate is variable and is determined
by the Timer 1 overflow rate or the Baud Rate Generator (described in
“Baud rate generator and
11 bits are transmitted (through TXD) or received (through RXD): start bit (logic 0), 8 data
bits (LSB first), a programmable 9
transmitted, the 9
Or, for example, the parity bit (P, in the PSW) could be moved into TB8. When data is
received, the 9
bit is not saved. The baud rate is programmable to either
frequency, as determined by the SMOD1 bit in PCON.
th
data bit goes into RB8 in Special Function Register SCON, while the stop
th
data bit (TB8 in SCON) can be assigned the value of logic 0 or logic 1.
Rev. 03 — 10 July 2007
8-bit microcontrollers with two-clock accelerated 80C51 core
selection”).
th
data bit, and a stop bit (logic 1). When data is
P89LPC9102/9103/9107
CCLK
1
16
1
32
16
or
or
of the CPU clock
1
CCLK
32
of the CPU clock
16
Section 8.18.5
© NXP B.V. 2007. All rights reserved.
.
36 of 61