P89LPC9103FTK NXP Semiconductors, P89LPC9103FTK Datasheet - Page 2

• Manufacturer Part Number: P89LPC9103FTK
• Description: MCU 8BIT 80C51 1K FLASH, HVSON-10
• Manufacturer: NXP Semiconductors

Specifications of P89LPC9103FTK

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 8
• Program Memory Size: 1KB
• Ram Memory Size: 128Byte
• Cpu Speed: 18MHz
• Oscillator Type: Internal Only
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant

NXP Semiconductors
3. Product comparison overview
P89LPC9102_9103_9107_3
Product data sheet
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Table 1
features, please see
Table 1.
Type number
P89LPC9102
P89LPC9103
P89LPC9107
In-Application Programming (IAP-Lite) and byte erase allows code memory to be used
for non-volatile data storage.
Serial flash ICP allows simple production coding with commercial EPROM
programmers. Flash security bits prevent reading of sensitive application programs.
Watchdog timer with separate on-chip oscillator, requiring no external components.
The watchdog prescaler is selectable from eight values.
Low voltage reset (Brownout detect) allows a graceful system shutdown when power
fails. May optionally be configured as an interrupt.
Idle mode and two different reduced power Power-down modes. Improved wake-up
from Power-down mode (a LOW interrupt input starts execution). Typical Power-down
mode current is less than 1 A (total Power-down mode with voltage comparators
disabled).
Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent spurious
and incomplete resets. A software reset function is also available.
Programmable port output configuration options: quasi-bidirectional, open drain,
push-pull, input-only.
Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
the pins match or do not match a programmable pattern.
LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
entire chip.
Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
minimum ramp times.
Only power and ground connections are required to operate the
P89LPC9102/9103/9107 when internal reset option is selected.
Four interrupt priority levels.
Two keypad interrupt inputs.
Second data pointer.
External clock input.
Clock output (P89LPC9102/9107).
Schmitt trigger port inputs.
Emulation support.
highlights the differences between these two devices. For a complete list of device
Product comparison overview
UART
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Section 2
Rev. 03 — 10 July 2007
8-bit microcontrollers with two-clock accelerated 80C51 core
“Features”.
T0 toggle/PWM
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P89LPC9102/9103/9107
T1 toggle/PWM
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© NXP B.V. 2007. All rights reserved.
CLKOUT
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