P89LPC9103FTK NXP Semiconductors, P89LPC9103FTK Datasheet - Page 32

• Manufacturer Part Number: P89LPC9103FTK
• Description: MCU 8BIT 80C51 1K FLASH, HVSON-10
• Manufacturer: NXP Semiconductors

Specifications of P89LPC9103FTK

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 8
• Program Memory Size: 1KB
• Ram Memory Size: 128Byte
• Cpu Speed: 18MHz
• Oscillator Type: Internal Only
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant

NXP Semiconductors
P89LPC9102_9103_9107_3
Product data sheet
8.12.2 Quasi-bidirectional output configuration
8.12.3 Open-drain output configuration
8.12.4 Input-only configuration
8.12.5 Push-pull output configuration
8.12.6 Port 0 analog functions
8.12.7 Additional port features
Quasi-bidirectional output type can be used as both an input and output without the need
to reconfigure the port. This is possible because when the port outputs a logic HIGH, it is
weakly driven, allowing an external device to pull the pin LOW. When the pin is driven
LOW, it is driven strongly and able to sink a fairly large current. These features are
somewhat similar to an open-drain output except that there are three pull-up transistors in
the quasi-bidirectional output that serve different purposes.
The P89LPC9102/9103/9107 is a 3 V device, however, the pins are 5 V-tolerant. In
quasi-bidirectional mode, if a user applies 5 V on the pin, there will be a current flowing
from the pin to V
quasi-bidirectional mode is discouraged.
A quasi-bidirectional port pin has a Schmitt triggered input that also has a glitch
suppression circuit.
The open-drain output configuration turns off all pull-ups and only drives the pull-down
transistor of the port driver when the port latch contains a logic 0. To be used as a logic
output, a port configured in this manner must have an external pull-up, typically a resistor
tied to V
An open-drain port pin has a Schmitt triggered input that also has a glitch suppression
circuit.
The input-only port configuration has no output drivers. It is a Schmitt triggered input that
also has a glitch suppression circuit.
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous strong
pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a port output. A push-pull port pin has a Schmitt
triggered input that also has a glitch suppression circuit.
The P89LPC9102/9103/9107 incorporates an Analog Comparator. In order to give the
best analog function performance and to minimize power consumption, pins that are being
used for analog functions must have the digital outputs and digital inputs disabled.
Digital outputs are disabled by putting the port output into the Input-only (high-impedance)
mode as described in
Digital inputs on Port 0 may be disabled through the use of the PT0AD register. On any
reset, the PT0AD bits default to logic 0s to enable digital functions.
After power-up, all pins are in Input-only mode. Please note that this is different from
the LPC76x series of devices.
DD
.
DD
, causing extra power consumption. Therefore, applying 5 V in
Section 8.12.4 “Input-only
Rev. 03 — 10 July 2007
8-bit microcontrollers with two-clock accelerated 80C51 core
P89LPC9102/9103/9107
configuration”.
© NXP B.V. 2007. All rights reserved.
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