CS4954-CQ Cirrus Logic Inc, CS4954-CQ Datasheet - Page 17

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CS4954-CQ

Manufacturer Part Number
CS4954-CQ
Description
Digital Video Encoder IC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS4954-CQ

No. Of Pins
48
Peak Reflow Compatible (260 C)
No
Ic Function
Digital Video Encoder IC
Leaded Process Compatible
No
Mounting Type
Surface Mount
Package / Case
48-TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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VSYNC stays low for 2.5 line-times and transitions
high with the beginning of line 315. Video input on
the V [7:0] pins is expected between line 336
through line 622.
5.2.7. Progressive Scan
The CS4954/5 supports a progessive scan mode in
which the video output is non-interlaced. This is
accomplished by displaying only the odd video
field for NTSC or PAL. To preserve precise
MPEG-2 frame rates of 30 and 25 per second, the
CS4954/5 displays the same odd field repetitively
but alternately varies the field times. This mode is
in contrast to other digital video encoders, which
DS278PP4
HSYNC
HSYNC
HSYNC
HSYNC
VSYNC
VSYNC
VSYNC
VSYNC
FIELD
FIELD
FIELD
FIELD
Line
Line
Line
Line
NTSC Vertical Timing (odd field)
NTSC Vertical Timing (even field)
PAL Vertical Timing (even field)
PAL Vertical Timing (odd field)
3
264
265
311
265
1
312
4
Figure 6. Vertical Timing
266
2
313
5
267
3
314
6
commonly support progressive scan by repetitively
displaying a 262 line field (524/525 lines for
NTSC). The common method is flawed: over time,
the output display rate will overrun a system-clock-
locked MPEG-2 decompressor and display a field
twice every 8.75 seconds.
5.2.8. NTSC Progressive Scan
VSYNC will transition low at line four to begin
field one and will remain low for three lines or
2574 pixel cycles (858 × 3). NTSC interlaced tim-
ing is illustrated in Figure 9. In this mode, the
CS4954/5 expects digital video input at the V [7:0]
268
4
315
7
269
5
316
8
9
270
6
317
CS4954 CS4955
10
271
7
318
17

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